1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00
llvm-mirror/test
Nemanja Ivanovic 8b3f85a32c [PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX
The dst/dstt/dstst/dststt instructions are nop's on all PowerPC
cores that AIX supports. The AIX assembler also does not accept
these mnemonics. Turn them into nop's on AIX (similar to dstall).
2021-07-27 15:50:02 -05:00
..
Analysis [AArch64] Update and expand min-max cost model test. NFC 2021-07-27 18:48:58 +01:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen [PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX 2021-07-27 15:50:02 -05:00
DebugInfo [DebugInfo][InstrRef] Handle llvm.frameaddress intrinsics gracefully 2021-07-27 13:44:37 +01:00
Demangle
Examples
ExecutionEngine [JITLink][RISCV] Run new test from 0ad562b48 only if the RISCV backend is enabled 2021-07-25 10:47:26 -04:00
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MachineVerifier
MC [AArch64][SME] Add zero instruction 2021-07-27 08:35:45 +00:00
Object [llvm-readobj] Display multiple function names for stack size entries 2021-07-26 14:49:53 +01:00
ObjectYAML [yaml2obj][MachO] Rename PayloadString to Content 2021-07-26 09:04:51 -07:00
Other
SafepointIRVerifier
Support
SymbolRewriter
TableGen
ThinLTO/X86
tools [Debug-Info][llvm-dwarfdump] Don't try to dump location 2021-07-27 07:28:59 +00:00
Transforms [Matrix] Fix shape for factored transpose 2021-07-27 11:36:13 -07:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh