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b89f706ba3
Summary: There are transformation that change setcc into other constructs, and transform that try to reconstruct a setcc from the brcond condition. Depending on what order these transform are done, the end result differs. Most of the time, it is preferable to get a setcc as a brcond argument (and this is why brcond try to recreate the setcc in the first place) so we ensure this is done every time by also doing it at the setcc level when the only user is a brcond. Reviewers: spatel, hfinkel, niravd, craig.topper Subscribers: nhaehnle, llvm-commits Differential Revision: https://reviews.llvm.org/D41235 llvm-svn: 325892
55 lines
1.6 KiB
LLVM
55 lines
1.6 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare i1 @llvm.amdgcn.class.f32(float, i32)
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; Produces error after adding an implicit def to v_cndmask_b32
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; GCN-LABEL: {{^}}vcc_shrink_vcc_def:
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; GCN: v_cmp_eq_u32_e64 vcc, s{{[0-9]+}}, 0{{$}}
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}}, vcc
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define amdgpu_kernel void @vcc_shrink_vcc_def(float %arg, i32 %arg1, float %arg2, i32 %arg3) {
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bb0:
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%tmp = icmp sgt i32 %arg1, 4
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%c = icmp eq i32 %arg3, 0
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%tmp4 = select i1 %c, float %arg, float 1.000000e+00
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%tmp5 = fcmp ogt float %arg2, 0.000000e+00
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%tmp6 = fcmp olt float %arg2, 1.000000e+00
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%tmp7 = fcmp olt float %arg, %tmp4
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%tmp8 = and i1 %tmp5, %tmp6
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%tmp9 = and i1 %tmp8, %tmp7
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br i1 %tmp9, label %bb1, label %bb2
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bb1:
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store volatile i32 0, i32 addrspace(1)* undef
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br label %bb2
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bb2:
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ret void
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}
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; The undef flag on the condition src must be preserved on the
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; implicit vcc use to avoid verifier errors.
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; GCN-LABEL: {{^}}preserve_condition_undef_flag:
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; GCN-NOT: vcc
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}}, vcc
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define amdgpu_kernel void @preserve_condition_undef_flag(float %arg, i32 %arg1, float %arg2) {
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bb0:
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%tmp = icmp sgt i32 %arg1, 4
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%undef = call i1 @llvm.amdgcn.class.f32(float undef, i32 undef)
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%tmp4 = select i1 %undef, float %arg, float 1.000000e+00
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%tmp5 = fcmp ogt float %arg2, 0.000000e+00
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%tmp6 = fcmp olt float %arg2, 1.000000e+00
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%tmp7 = fcmp olt float %arg, %tmp4
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%tmp8 = and i1 %tmp5, %tmp6
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%tmp9 = and i1 %tmp8, %tmp7
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br i1 %tmp9, label %bb1, label %bb2
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bb1:
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store volatile i32 0, i32 addrspace(1)* undef
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br label %bb2
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bb2:
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ret void
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}
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