mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-22 04:22:57 +02:00
1ee8ccb61a
I didn't notice any significant changes in the actual checks here; all of these tests already used FileCheck, so a script can batch update them in one shot. This commit is just to show the value of automating this process: We have uniform formatting as opposed to a mish-mash of check structure that changes based on individual prefs and the current fashion. This makes it simpler to update when we find a bug or make an enhancement. llvm-svn: 264457
234 lines
4.7 KiB
LLVM
234 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i64 @pow2(i32 %x) {
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; CHECK-LABEL: @pow2(
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; CHECK: [[NEGX:%.*]] = sub i32 0, %x
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; CHECK-NEXT: [[X2:%.*]] = and i32 %x, [[NEGX]]
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; CHECK-NEXT: [[E:%.*]] = zext i32 [[X2]] to i64
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; CHECK-NEXT: ret i64 [[E]]
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;
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%negx = sub i32 0, %x
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%x2 = and i32 %x, %negx
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%e = zext i32 %x2 to i64
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%nege = sub i64 0, %e
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%e2 = and i64 %e, %nege
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ret i64 %e2
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}
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define i64 @pow2b(i32 %x) {
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; CHECK-LABEL: @pow2b(
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; CHECK: [[SH:%.*]] = shl i32 2, %x
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; CHECK-NEXT: [[E:%.*]] = zext i32 [[SH]] to i64
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; CHECK-NEXT: ret i64 [[E]]
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;
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%sh = shl i32 2, %x
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%e = zext i32 %sh to i64
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%nege = sub i64 0, %e
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%e2 = and i64 %e, %nege
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ret i64 %e2
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}
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define i32 @sub_neg_nuw(i32 %x, i32 %y) {
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; CHECK-LABEL: @sub_neg_nuw(
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; CHECK: ret i32 %x
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;
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%neg = sub nuw i32 0, %y
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%sub = sub i32 %x, %neg
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ret i32 %sub
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}
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define i1 @and_of_icmps0(i32 %b) {
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; CHECK-LABEL: @and_of_icmps0(
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; CHECK: ret i1 false
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;
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%1 = add i32 %b, 2
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%2 = icmp ult i32 %1, 4
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%cmp3 = icmp sgt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @and_of_icmps1(i32 %b) {
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; CHECK-LABEL: @and_of_icmps1(
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; CHECK: ret i1 false
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;
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%1 = add nsw i32 %b, 2
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%2 = icmp slt i32 %1, 4
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%cmp3 = icmp sgt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @and_of_icmps2(i32 %b) {
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; CHECK-LABEL: @and_of_icmps2(
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; CHECK: ret i1 false
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;
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%1 = add i32 %b, 2
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%2 = icmp ule i32 %1, 3
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%cmp3 = icmp sgt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @and_of_icmps3(i32 %b) {
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; CHECK-LABEL: @and_of_icmps3(
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; CHECK: ret i1 false
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;
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%1 = add nsw i32 %b, 2
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%2 = icmp sle i32 %1, 3
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%cmp3 = icmp sgt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @and_of_icmps4(i32 %b) {
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; CHECK-LABEL: @and_of_icmps4(
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; CHECK: ret i1 false
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;
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%1 = add nuw i32 %b, 2
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%2 = icmp ult i32 %1, 4
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%cmp3 = icmp ugt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @and_of_icmps5(i32 %b) {
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; CHECK-LABEL: @and_of_icmps5(
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; CHECK: ret i1 false
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;
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%1 = add nuw i32 %b, 2
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%2 = icmp ule i32 %1, 3
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%cmp3 = icmp ugt i32 %b, 2
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%cmp = and i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps0(i32 %b) {
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; CHECK-LABEL: @or_of_icmps0(
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; CHECK: ret i1 true
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;
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%1 = add i32 %b, 2
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%2 = icmp uge i32 %1, 4
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%cmp3 = icmp sle i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps1(i32 %b) {
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; CHECK-LABEL: @or_of_icmps1(
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; CHECK: ret i1 true
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;
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%1 = add nsw i32 %b, 2
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%2 = icmp sge i32 %1, 4
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%cmp3 = icmp sle i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps2(i32 %b) {
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; CHECK-LABEL: @or_of_icmps2(
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; CHECK: ret i1 true
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;
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%1 = add i32 %b, 2
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%2 = icmp ugt i32 %1, 3
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%cmp3 = icmp sle i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps3(i32 %b) {
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; CHECK-LABEL: @or_of_icmps3(
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; CHECK: ret i1 true
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;
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%1 = add nsw i32 %b, 2
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%2 = icmp sgt i32 %1, 3
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%cmp3 = icmp sle i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps4(i32 %b) {
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; CHECK-LABEL: @or_of_icmps4(
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; CHECK: ret i1 true
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;
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%1 = add nuw i32 %b, 2
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%2 = icmp uge i32 %1, 4
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%cmp3 = icmp ule i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i1 @or_of_icmps5(i32 %b) {
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; CHECK-LABEL: @or_of_icmps5(
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; CHECK: ret i1 true
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;
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%1 = add nuw i32 %b, 2
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%2 = icmp ugt i32 %1, 3
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%cmp3 = icmp ule i32 %b, 2
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%cmp = or i1 %2, %cmp3
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ret i1 %cmp
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}
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define i32 @neg_nuw(i32 %x) {
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; CHECK-LABEL: @neg_nuw(
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; CHECK: ret i32 0
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;
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%neg = sub nuw i32 0, %x
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ret i32 %neg
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}
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define i1 @and_icmp1(i32 %x, i32 %y) {
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; CHECK-LABEL: @and_icmp1(
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; CHECK: [[TMP1:%.*]] = icmp ult i32 %x, %y
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%1 = icmp ult i32 %x, %y
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%2 = icmp ne i32 %y, 0
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%3 = and i1 %1, %2
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ret i1 %3
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}
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define i1 @and_icmp2(i32 %x, i32 %y) {
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; CHECK-LABEL: @and_icmp2(
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; CHECK: ret i1 false
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;
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%1 = icmp ult i32 %x, %y
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%2 = icmp eq i32 %y, 0
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%3 = and i1 %1, %2
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ret i1 %3
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}
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define i1 @or_icmp1(i32 %x, i32 %y) {
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; CHECK-LABEL: @or_icmp1(
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; CHECK: [[TMP1:%.*]] = icmp ne i32 %y, 0
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%1 = icmp ult i32 %x, %y
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%2 = icmp ne i32 %y, 0
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%3 = or i1 %1, %2
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ret i1 %3
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}
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define i1 @or_icmp2(i32 %x, i32 %y) {
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; CHECK-LABEL: @or_icmp2(
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; CHECK: ret i1 true
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;
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%1 = icmp uge i32 %x, %y
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%2 = icmp ne i32 %y, 0
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%3 = or i1 %1, %2
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ret i1 %3
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}
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define i1 @or_icmp3(i32 %x, i32 %y) {
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; CHECK-LABEL: @or_icmp3(
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; CHECK: [[TMP1:%.*]] = icmp uge i32 %x, %y
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%1 = icmp uge i32 %x, %y
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%2 = icmp eq i32 %y, 0
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%3 = or i1 %1, %2
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ret i1 %3
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}
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