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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
llvm-mirror/test
Andrea Di Biagio ad80113e58 [MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs.
This patch fixes the logic that checks for variadic register definitions,

Before llvm-svn 348114 (commit 4cf35b4ab0b), it was not possible to explicitly
mark variadic operands as definitions. By default, variadic operands of an
MCInst were always assumed to be uses. A number of had-hoc checks were
introduced in the InstrBuilder to fix the processing of variadic register
operands of ARM ldm/stm variants.

This patch simply replaces those old (and buggy) checks with a much simpler (and
correct) check for MCID::Flag::VariadicOpsAreDefs.
2021-06-15 09:52:38 +01:00
..
Analysis [CostModel][AArch64] Improve the cost estimate of CTPOP intrinsic 2021-06-11 11:15:46 +01:00
Assembler Intrinsic::getName: require a Module argument 2021-06-14 14:52:29 +02:00
Bindings
Bitcode
BugPoint
CodeGen [X86] Use EVT::getVectorVT instead of changeVectorElementType in reduceVMULWidth. 2021-06-14 22:07:04 -07:00
DebugInfo Revert "[NFC] This is a test commit to check commit access." 2021-06-15 06:25:22 +01:00
Demangle [Demangle][Rust] Parse const backreferences 2021-06-08 10:01:50 +02:00
Examples
ExecutionEngine [JITLink][MachO] Add missing testcase. 2021-06-13 20:43:49 +10:00
Feature
FileCheck
Instrumentation [HWASan] Enable globals support for LAM. 2021-06-14 14:20:44 -07:00
Integer
JitListener
Linker [IR] make -warn-frame-size into a module attr 2021-06-10 16:15:27 -07:00
LTO LTO: Export functions referenced by non-canonical CFI jump tables 2021-06-08 14:57:43 -07:00
MachineVerifier
MC [PowerPC] Export 16 byte load-store instructions 2021-06-15 01:56:10 +00:00
Object Reland "[AMDGPU] Add gfx1013 target" 2021-06-08 21:15:35 -04:00
ObjectYAML
Other Revert "[DSE] Remove stores in the same loop iteration" 2021-06-08 21:23:08 +01:00
SafepointIRVerifier
Support
SymbolRewriter
TableGen
ThinLTO/X86 [LTO] Support new PM in ThinLTOCodeGenerator. 2021-06-09 10:05:14 +01:00
tools [MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs. 2021-06-15 09:52:38 +01:00
Transforms [InstCombine] add DeMorgan folds for logical ops in select form 2021-06-14 12:54:35 -04:00
Unit
Verifier [VP] Binary floating-point intrinsics. 2021-06-14 08:51:41 +02:00
YAMLParser
.clang-format
CMakeLists.txt Revert "[IRSim] Adding basic implementation of llvm-sim." 2021-06-11 15:44:19 -05:00
lit.cfg.py Revert "[IRSim] Adding basic implementation of llvm-sim." 2021-06-11 15:44:19 -05:00
lit.site.cfg.py.in
TestRunner.sh