Igor Breger 8b9daa338d AVX512: Add vpmovzxbw/d/q ,vpmovzxw/d/q ,vpmovzxbdq lowering patterns that support 256bit inputs like AVX patterns ( that are disable in case HasVLX , see SS41I_pmovx_avx2_patterns). ... Differential Revision: http://reviews.llvm.org/D17504 llvm-svn: 261724		2016-02-24 08:15:20 +00:00
..
AArch64	[AArch64] Generate csinv instruction more often	2016-02-23 19:34:13 +00:00
AMDGPU	AMDGPU: Add failing testcase for register coalescer	2016-02-22 23:45:42 +00:00
ARM	ARM: sink atomic release barrier as far as possible into cmpxchg.	2016-02-22 20:55:50 +00:00
BPF
CPP
Generic	Revert r261070, it caused PR26652 / PR26653.	2016-02-17 18:47:29 +00:00
Hexagon	[Hexagon] Implement TLS support	2016-02-18 15:42:57 +00:00
Inputs
Mips	[MC][ELF] Handle MIPS specific .sdata and .sbss directives	2016-02-11 06:45:54 +00:00
MIR	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
MSP430
NVPTX	Don't tail-duplicate blocks that contain convergent instructions.	2016-02-22 17:50:52 +00:00
PowerPC	Fix for PR26690 take 2	2016-02-22 18:04:00 +00:00
SPARC
SystemZ	[SystemZ] Fix ABI for i128 argument and return types	2016-02-19 14:10:21 +00:00
Thumb
Thumb2
WebAssembly	Revert "[WebAssembly] Stackify code emitted by eliminateFrameIndex"	2016-02-23 22:13:21 +00:00
WinEH	[WinEH] Visit 'unwind to caller' catchswitches nested in catchswitches	2016-02-23 07:18:15 +00:00
X86	AVX512: Add vpmovzxbw/d/q ,vpmovzxw/d/q ,vpmovzxbdq lowering patterns that support 256bit inputs like AVX patterns ( that are disable in case HasVLX , see SS41I_pmovx_avx2_patterns).	2016-02-24 08:15:20 +00:00
XCore