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llvm-mirror/test/CodeGen/ARM/prefetch.ll
Stephen Lin 7e501cf4c3 Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done

llvm-svn: 186280
2013-07-14 06:24:09 +00:00

78 lines
1.8 KiB
LLVM

; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld
; RUN: llc < %s -march=thumb -mattr=+v7 | FileCheck %s -check-prefix=THUMB2
; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s -check-prefix=ARM
; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP
; rdar://8601536
define void @t1(i8* %ptr) nounwind {
entry:
; ARM-LABEL: t1:
; ARM-NOT: pldw [r0]
; ARM: pld [r0]
; ARM-MP-LABEL: t1:
; ARM-MP: pldw [r0]
; ARM-MP: pld [r0]
; THUMB2-LABEL: t1:
; THUMB2-NOT: pldw [r0]
; THUMB2: pld [r0]
tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
ret void
}
define void @t2(i8* %ptr) nounwind {
entry:
; ARM-LABEL: t2:
; ARM: pld [r0, #1023]
; THUMB2-LABEL: t2:
; THUMB2: pld [r0, #1023]
%tmp = getelementptr i8* %ptr, i32 1023
tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3, i32 1 )
ret void
}
define void @t3(i32 %base, i32 %offset) nounwind {
entry:
; ARM-LABEL: t3:
; ARM: pld [r0, r1, lsr #2]
; THUMB2-LABEL: t3:
; THUMB2: lsrs r1, r1, #2
; THUMB2: pld [r0, r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 )
ret void
}
define void @t4(i32 %base, i32 %offset) nounwind {
entry:
; ARM-LABEL: t4:
; ARM: pld [r0, r1, lsl #2]
; THUMB2-LABEL: t4:
; THUMB2: pld [r0, r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 )
ret void
}
declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind
define void @t5(i8* %ptr) nounwind {
entry:
; ARM-LABEL: t5:
; ARM: pli [r0]
; THUMB2-LABEL: t5:
; THUMB2: pli [r0]
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 )
ret void
}