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llvm-mirror/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
Alexander Timofeev dd292a30dc [AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.'
Detailed description:

    After https://reviews.llvm.org/D59990 submit several issues were discovered.
    Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly.

    Discovered issues were addressed in the following commits:

    https://reviews.llvm.org/D67662
    https://reviews.llvm.org/D67101
    https://reviews.llvm.org/D63953
    https://reviews.llvm.org/D63731

    This change brings back AMDGPU specific changes.

  Reviewed by: rampitec, arsenm

  Differential Revision: https://reviews.llvm.org/D68635

llvm-svn: 374767
2019-10-14 12:01:10 +00:00

75 lines
1.6 KiB
YAML

# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies %s -o - | FileCheck %s -check-prefixes=GCN
---
name: phi_visit_order
tracksRegLiveness: true
registers:
- { id: 0, class: sreg_32_xm0 }
- { id: 1, class: sreg_64 }
- { id: 2, class: sreg_32_xm0 }
- { id: 7, class: vgpr_32 }
- { id: 8, class: sreg_32_xm0 }
- { id: 9, class: vgpr_32 }
- { id: 10, class: sreg_64 }
- { id: 11, class: sreg_32_xm0 }
body: |
; GCN-LABEL: name: phi_visit_order
; GCN: S_ADD_I32
bb.0:
liveins: $vgpr0
%7 = COPY $vgpr0
%8 = S_MOV_B32 0
bb.1:
%0 = PHI %8, %bb.0, %0, %bb.1, %2, %bb.2
%9 = V_MOV_B32_e32 9, implicit $exec
%10 = V_CMP_EQ_U32_e64 %7, %9, implicit $exec
%1 = SI_IF %10, %bb.2, implicit-def $exec, implicit-def $scc, implicit $exec
S_BRANCH %bb.1
bb.2:
SI_END_CF %1, implicit-def $exec, implicit-def $scc, implicit $exec
%11 = S_MOV_B32 1
%2 = S_ADD_I32 %0, %11, implicit-def $scc
S_BRANCH %bb.1
...
---
# GCN-LABEL: name: dead_illegal_virtreg_copy
# GCN: %0:vgpr_32 = COPY $vgpr0
# GCN: %1:sreg_32_xm0 = IMPLICIT_DEF
# GCN: S_ENDPGM 0, implicit %0
name: dead_illegal_virtreg_copy
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
%0:vgpr_32 = COPY $vgpr0
%1:sreg_32_xm0 = COPY %0
S_ENDPGM 0, implicit %1
...
---
# GCN-LABEL: name: dead_illegal_physreg_copy
# GCN %2:vgpr_32 = COPY $vgpr0
# GCN: %1:sreg_32_xm0 = IMPLICIT_DEF
# GCN: S_ENDPGM 0, implicit %2
name: dead_illegal_physreg_copy
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
%0:sreg_32_xm0 = COPY $vgpr0
%1:sreg_32_xm0 = COPY %0
S_ENDPGM 0, implicit %1
...