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38e5713f51
Summary: This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon Reviewed By: RKSimon Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60228 llvm-svn: 357802
27 lines
661 B
YAML
27 lines
661 B
YAML
# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
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# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
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# Test that CFI verifier finds inconsistent offset between bb.end and one of
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# its precedessors.
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--- |
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define void @inconsistentOffset() {
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bb.end:
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ret void
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}
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...
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---
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# CHECK: *** Inconsistent CFA register and/or offset between pred and succ ***
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# CHECK: Succ: bb.end
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# CHECK: LLVM ERROR: Found 1 in/out CFI information errors.
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name: inconsistentOffset
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body: |
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bb.0:
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CFI_INSTRUCTION def_cfa_offset 24
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JCC_1 %bb.2, 5, implicit undef $eflags
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bb.1:
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CFI_INSTRUCTION def_cfa_offset 32
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bb.2.bb.end:
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RET 0
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...
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