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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
64 lines
1.9 KiB
LLVM
64 lines
1.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}s_sext_i1_to_i32:
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; SI: v_cndmask_b32_e64
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; SI: s_endpgm
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define void @s_sext_i1_to_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp eq i32 %a, %b
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%sext = sext i1 %cmp to i32
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store i32 %sext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_s_sext_i32_to_i64:
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; SI: s_ashr_i32
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; SI: s_endpg
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define void @test_s_sext_i32_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) nounwind {
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entry:
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%mul = mul i32 %a, %b
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%add = add i32 %mul, %c
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%sext = sext i32 %add to i64
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store i64 %sext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}s_sext_i1_to_i64:
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; SI: v_cndmask_b32_e64 v[[LOREG:[0-9]+]], 0, -1, vcc
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; SI: v_mov_b32_e32 v[[HIREG:[0-9]+]], v[[LOREG]]
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; SI: buffer_store_dwordx2 v{{\[}}[[LOREG]]:[[HIREG]]{{\]}}
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; SI: s_endpgm
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define void @s_sext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp eq i32 %a, %b
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%sext = sext i1 %cmp to i64
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store i64 %sext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}s_sext_i32_to_i64:
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; SI: s_ashr_i32
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; SI: s_endpgm
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define void @s_sext_i32_to_i64(i64 addrspace(1)* %out, i32 %a) nounwind {
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%sext = sext i32 %a to i64
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store i64 %sext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}v_sext_i32_to_i64:
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; SI: v_ashr
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; SI: s_endpgm
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define void @v_sext_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%val = load i32, i32 addrspace(1)* %in, align 4
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%sext = sext i32 %val to i64
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store i64 %sext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}s_sext_i16_to_i64:
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; SI: s_endpgm
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define void @s_sext_i16_to_i64(i64 addrspace(1)* %out, i16 %a) nounwind {
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%sext = sext i16 %a to i64
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store i64 %sext, i64 addrspace(1)* %out, align 8
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ret void
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}
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