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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen
Bill Schmidt 8da856ce76 [PPC64LE] Remove implicit-subreg restriction from VSX swap removal
In r241285, I removed the SUBREG_TO_REG restriction from VSX swap
removal, determining that this was overly conservative.  We have
another form of the same restriction in that we check for the presence
of implicit subregs in vector operations.  As with SUBREG_TO_REG for
partial register conversions, an implicit subreg is safe in and of
itself, provided no other operation makes a lane-sensitive assumption
about the result.  This patch removes that restriction, by removing
the HasImplicitSubreg flag and all code that relies on it.

I've added a test case that fails to optimize before this patch is
applied, and optimizes properly with the patch.  Test based on a
report from Anton Blanchard.

llvm-svn: 241290
2015-07-02 19:01:22 +00:00
..
AArch64
AMDGPU Test for specific output in lit test 2015-07-01 22:34:59 +00:00
ARM
BPF
CPP
Generic
Hexagon
Inputs
Mips
MIR MIR Serialization: Serialize MBB successors. 2015-06-30 18:16:42 +00:00
MSP430
NVPTX [NVPTX] expand extload/truncstore for vectors of floats 2015-07-01 21:32:42 +00:00
PowerPC [PPC64LE] Remove implicit-subreg restriction from VSX swap removal 2015-07-02 19:01:22 +00:00
SPARC
SystemZ
Thumb
Thumb2
WinEH
X86 Reapply r240291: Fix shl folding in DAG combiner. 2015-07-02 11:44:54 +00:00
XCore