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c74965ca17
Summary: This cleans up most allocas NVPTXLowerKernelArgs emits for byval parameters. Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store. Reviewers: eliben, jholewinski Reviewed By: eliben, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10322 llvm-svn: 239368
29 lines
1.3 KiB
LLVM
29 lines
1.3 KiB
LLVM
; RUN: opt < %s -nvptx-lower-kernel-args -S | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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target triple = "nvptx64-unknown-unknown"
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%struct.S = type { i32, i32 }
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; Function Attrs: nounwind
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define void @_Z11TakesStruct1SPi(%struct.S* byval nocapture readonly %input, i32* nocapture %output) #0 {
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entry:
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; CHECK-LABEL: @_Z11TakesStruct1SPi
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; PTX-LABEL: .visible .entry _Z11TakesStruct1SPi(
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; CHECK: addrspacecast %struct.S* %input to %struct.S addrspace(101)*
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%b = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
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%0 = load i32, i32* %b, align 4
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; PTX-NOT: ld.param.u32 {{%r[0-9]+}}, [{{%rd[0-9]+}}]
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; PTX: ld.param.u32 [[value:%r[0-9]+]], [{{%rd[0-9]+}}+4]
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store i32 %0, i32* %output, align 4
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; PTX-NEXT: st.global.u32 [{{%rd[0-9]+}}], [[value]]
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ret void
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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!nvvm.annotations = !{!0}
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!0 = !{void (%struct.S*, i32*)* @_Z11TakesStruct1SPi, !"kernel", i32 1}
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