1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 21:13:02 +02:00
llvm-mirror/test/CodeGen/X86/not-and-simplify.ll
Sanjay Patel 2d36a55f0e [TargetLowering] add special-case for demanded bits analysis of 'not'
We treat bitwise 'not' as a special operation and try not to reduce its all-ones mask. 
Presumably, this is because a 'not' may be cheaper than a generic 'xor' or it may get
folded into another logic op if the target has those. However, if we can remove a logic
instruction by changing the xor's constant mask value, that should always be a win.

Note that the IR version of SimplifyDemandedBits() does not treat 'not' as a special-case
currently (although that's marked with a FIXME). So if you run this IR through -instcombine,
you should get the same end result. I'm hoping to add a different backend transform that 
will expose this problem though, so I need to solve this first.

Differential Revision: https://reviews.llvm.org/D27356

llvm-svn: 288676
2016-12-05 15:58:21 +00:00

37 lines
1.0 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-bmi | FileCheck %s --check-prefix=ALL --check-prefix=NO_BMI
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=ALL --check-prefix=BMI
; Clear high bits via shift, set them with xor (not), then mask them off.
define i32 @shrink_xor_constant1(i32 %x) {
; ALL-LABEL: shrink_xor_constant1:
; ALL: # BB#0:
; ALL-NEXT: shrl $31, %edi
; ALL-NEXT: xorl $1, %edi
; ALL-NEXT: movl %edi, %eax
; ALL-NEXT: retq
;
%sh = lshr i32 %x, 31
%not = xor i32 %sh, -1
%and = and i32 %not, 1
ret i32 %and
}
; Clear low bits via shift, set them with xor (not), then mask them off.
define i8 @shrink_xor_constant2(i8 %x) {
; ALL-LABEL: shrink_xor_constant2:
; ALL: # BB#0:
; ALL-NEXT: shlb $5, %dil
; ALL-NEXT: xorb $-32, %dil
; ALL-NEXT: movl %edi, %eax
; ALL-NEXT: retq
;
%sh = shl i8 %x, 5
%not = xor i8 %sh, -1
%and = and i8 %not, 224 ; 0xE0
ret i8 %and
}