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https://github.com/RPCS3/llvm-mirror.git
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3bd9485a7c
Previous check-in message was: The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual. These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262135
72 lines
2.8 KiB
ArmAsm
72 lines
2.8 KiB
ArmAsm
! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
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! CHECK: ld [%i1], %c4 ! encoding: [0xc9,0x86,0x40,0x00]
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! CHECK: ld [%i1+-15], %c4 ! encoding: [0xc9,0x86,0x7f,0xf1]
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! CHECK: ld [%i1+%o3], %c4 ! encoding: [0xc9,0x86,0x40,0x0b]
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! CHECK: ld [%i7], %c4 ! encoding: [0xc9,0x87,0xc0,0x00]
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! CHECK: ld [%i1], %c19 ! encoding: [0xe7,0x86,0x40,0x00]
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ld [%i1], %c4
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ld [%i1 - 15], %c4
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ld [%i1 +%o3], %c4
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ld [%i7], %c4
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ld [%i1], %c19
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! CHECK: ldd [%i1], %c4 ! encoding: [0xc9,0x9e,0x40,0x00]
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! CHECK: ldd [%i7], %c4 ! encoding: [0xc9,0x9f,0xc0,0x00]
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! CHECK: ldd [%i7+200], %c4 ! encoding: [0xc9,0x9f,0xe0,0xc8]
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! CHECK: ldd [%i7+%o3], %c4 ! encoding: [0xc9,0x9f,0xc0,0x0b]
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! CHECK: ldd [%i1], %c30 ! encoding: [0xfd,0x9e,0x40,0x00]
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ldd [%i1], %c4
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ldd [%i7], %c4
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ldd [%i7 + 200], %c4
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ldd [%i7+%o3], %c4
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ldd [%i1], %c30
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! CHECK: st %c4, [%i1] ! encoding: [0xc9,0xa6,0x40,0x00]
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! CHECK: st %c4, [%i7] ! encoding: [0xc9,0xa7,0xc0,0x00]
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! CHECK: st %c4, [%i7+48] ! encoding: [0xc9,0xa7,0xe0,0x30]
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! CHECK: st %c4, [%i4+%o2] ! encoding: [0xc9,0xa7,0x00,0x0a]
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! CHECK: st %c19, [%i1] ! encoding: [0xe7,0xa6,0x40,0x00]
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st %c4, [%i1]
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st %c4, [%i7]
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st %c4, [%i7+48]
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st %c4, [%i4+%o2]
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st %c19, [%i1]
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! CHECK: std %c4, [%i1] ! encoding: [0xc9,0xbe,0x40,0x00]
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! CHECK: std %c4, [%i7] ! encoding: [0xc9,0xbf,0xc0,0x00]
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! CHECK: std %c4, [%i2+-240] ! encoding: [0xc9,0xbe,0xbf,0x10]
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! CHECK: std %c4, [%i1+%o5] ! encoding: [0xc9,0xbe,0x40,0x0d]
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! CHECK: std %c30, [%i1] ! encoding: [0xfd,0xbe,0x40,0x00]
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std %c4, [%i1]
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std %c4, [%i7]
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std %c4, [%i2-240]
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std %c4, [%i1+%o5]
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std %c30, [%i1]
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! CHECK: ld [%i5], %csr ! encoding: [0xc1,0x8f,0x40,0x00]
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! CHECK: ld [%l2+3], %csr ! encoding: [0xc1,0x8c,0xa0,0x03]
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! CHECK: ld [%l4+%l5], %csr ! encoding: [0xc1,0x8d,0x00,0x15]
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ld [%i5], %csr
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ld [%l2+3], %csr
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ld [%l4+%l5], %csr
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! CHECK: st %csr, [%i2] ! encoding: [0xc1,0xae,0x80,0x00]
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! CHECK: st %csr, [%i2+31] ! encoding: [0xc1,0xae,0xa0,0x1f]
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! CHECK: st %csr, [%i2+%o2] ! encoding: [0xc1,0xae,0x80,0x0a]
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st %csr, [%i2]
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st %csr, [%i2+31]
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st %csr, [%i2+%o2]
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! CHECK: std %cq, [%o3] ! encoding: [0xc1,0xb2,0xc0,0x00]
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! CHECK: std %cq, [%o3+-93] ! encoding: [0xc1,0xb2,0xff,0xa3]
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! CHECK: std %cq, [%o3+%l5] ! encoding: [0xc1,0xb2,0xc0,0x15]
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std %cq, [%o3]
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std %cq, [%o3-93]
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std %cq, [%o3+%l5]
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