Misha Brukman 8dd0e2fb27 * Force all "don't care" bits to 0 so that there are absolutely no unset bits in ... the TableGen descriptions; all unset bits are thus errors. * As a result, found and fixed instructions where some operands were not actually assigned into the right portion of the instruction. llvm-svn: 7074		2003-07-02 19:37:48 +00:00
..
.cvsignore	Since there is now another derived .inc file, ignore them all.	2003-05-29 20:15:27 +00:00
EmitAssembly.cpp	Reverting previous beautification changes.	2003-05-31 07:27:17 +00:00
EmitBytecodeToAssembly.cpp	changed implementation of LLVM BYTECODE Length	2002-07-25 17:22:48 +00:00
Makefile	Merged in autoconf branch. This provides configuration via the autoconf	2003-06-30 21:59:07 +00:00
MappingInfo.cpp	lib/CodeGen/Mapping/MappingInfo.cpp:	2003-06-04 22:07:12 +00:00
MappingInfo.h	Add file comment. Include <vector> and <string>. Update include guards	2003-06-04 22:02:47 +00:00
PeepholeOpts.cpp	Cleaned up code layout; no functional changes.	2003-05-23 19:20:57 +00:00
PreSelection.cpp	(1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and	2003-07-02 01:23:15 +00:00
PrologEpilogCodeInserter.cpp	* Changed Bcc instructions to behave like BPcc instructions	2003-06-06 09:52:23 +00:00
Sparc.burg.in	Add support for compiling varargs functions.	2003-05-25 15:59:47 +00:00
Sparc.cpp	lib/Target/Sparc/Sparc.cpp:	2003-06-18 21:14:23 +00:00
SparcInstr.def	RDCCR defines arg. #1, not arg. #2.	2003-06-20 11:32:11 +00:00
SparcInstrInfo.cpp	Merged in autoconf branch. This provides configuration via the autoconf	2003-06-30 21:59:07 +00:00
SparcInstrSelection.cpp	Force fixed-size but large alloca objects to the dynamically allocated	2003-07-02 06:59:22 +00:00
SparcInstrSelectionSupport.h	* Changed Bcc instructions to behave like BPcc instructions	2003-06-06 09:52:23 +00:00
SparcInternals.h	Merged in autoconf branch. This provides configuration via the autoconf	2003-06-30 21:59:07 +00:00
SparcRegClassInfo.cpp	Fixed `volatile' typo.	2003-05-21 19:34:28 +00:00
SparcRegClassInfo.h	Added special register class containing (for now) %fsr.	2003-05-27 00:02:22 +00:00
SparcRegInfo.cpp	Bug/case fixes:	2003-07-02 01:13:57 +00:00
SparcV9_F2.td	Moved predict and annul fields to the end of each individual instruction	2003-06-05 23:33:15 +00:00
SparcV9_F3.td	* Force all "don't care" bits to 0 so that there are absolutely no unset bits in	2003-07-02 19:37:48 +00:00
SparcV9_F4.td	* Force all "don't care" bits to 0 so that there are absolutely no unset bits in	2003-07-02 19:37:48 +00:00
SparcV9_Reg.td	* Broke up SparcV9.td into separate files as it was getting unmanageable	2003-05-29 03:31:43 +00:00
SparcV9.td	Properly fix instruction syntax in comments, using `imm' for instructions that	2003-07-02 18:15:43 +00:00
SparcV9CodeEmitter.cpp	Print address out as hex.	2003-06-06 09:53:28 +00:00
SparcV9CodeEmitter.h	Added lazy function resolution to the JIT.	2003-06-05 20:52:06 +00:00
StackSlots.cpp	Rename MachineInstrInfo -> TargetInstrInfo	2003-01-14 22:00:31 +00:00
UltraSparcSchedInfo.cpp	Added 'r' and 'i' versions to WRCCR.	2003-06-06 09:52:58 +00:00