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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Jakob Stoklund Olesen 8dde5739cb Add XFAIL testcase for setcc undef.
llvm-svn: 79093
2009-08-15 12:10:22 +00:00
..
Alpha
ARM Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 2009-08-12 20:51:55 +00:00
Blackfin Add XFAIL testcase for setcc undef. 2009-08-15 12:10:22 +00:00
CBackend
CellSPU
CPP
Generic
Mips reintroduce support for Mips "small" section handling. This is 2009-08-13 06:28:06 +00:00
MSP430
PIC16 this passes. 2009-08-06 03:55:49 +00:00
PowerPC Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' 2009-08-13 23:30:21 +00:00
SPARC
SystemZ Various AsmWriter output cleanups. Use WriteAsOperand instead of 2009-08-13 01:36:44 +00:00
Thumb tPOP_RET now has predicate operands. 2009-08-13 06:05:07 +00:00
Thumb2 Fix tests. 2009-08-15 08:23:11 +00:00
X86 On x86-64, for a varargs function, don't store the xmm registers to 2009-08-15 01:38:56 +00:00
XCore use XCore-specific section with xcore specific cp/dp flags to restore 2009-08-15 06:09:35 +00:00