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llvm-mirror/test/CodeGen/ARM64/inline-asm-zero-reg-error.ll
Tim Northover 2f13163a84 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00

12 lines
326 B
LLVM

; RUN: not llc < %s -march=arm64 2>&1 | FileCheck %s
; The 'z' constraint allocates either xzr or wzr, but obviously an input of 1 is
; incompatible.
define void @test_bad_zero_reg() {
tail call void asm sideeffect "USE($0)", "z"(i32 1) nounwind
; CHECK: error: invalid operand for inline asm constraint 'z'
ret void
}