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the first source operand is tied to the destination operand. This is to accurately model the corresponding instructions where the upper bits are unmodified. rdar://12558838 PR14221 llvm-svn: 167064
37 lines
1.5 KiB
LLVM
37 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -mcpu=nehalem | FileCheck %s
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; rdar: 12558838
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; PR14221
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; There is a mismatch between the intrinsic and the actual instruction.
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; The actual instruction has a partial update of dest, while the intrinsic
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; passes through the upper FP values. Here, we make sure the source and
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; destination of rsqrtss are the same.
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define void @t1(<4 x float> %a) nounwind uwtable ssp {
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entry:
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; CHECK: t1:
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; CHECK: rsqrtss %xmm0, %xmm0
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%0 = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a) nounwind
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%a.addr.0.extract = extractelement <4 x float> %0, i32 0
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%conv = fpext float %a.addr.0.extract to double
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%a.addr.4.extract = extractelement <4 x float> %0, i32 1
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%conv3 = fpext float %a.addr.4.extract to double
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tail call void @callee(double %conv, double %conv3) nounwind
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ret void
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}
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declare void @callee(double, double)
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declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
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define void @t2(<4 x float> %a) nounwind uwtable ssp {
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entry:
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; CHECK: t2:
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; CHECK: rcpss %xmm0, %xmm0
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%0 = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a) nounwind
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%a.addr.0.extract = extractelement <4 x float> %0, i32 0
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%conv = fpext float %a.addr.0.extract to double
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%a.addr.4.extract = extractelement <4 x float> %0, i32 1
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%conv3 = fpext float %a.addr.4.extract to double
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tail call void @callee(double %conv, double %conv3) nounwind
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ret void
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}
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declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
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