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fa2f6e25bc
As or RV32I, we include these for completeness. Committing now to make it easier to review the RV64A patch. llvm-svn: 350962
66 lines
1.6 KiB
LLVM
66 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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define void @fence_acquire() nounwind {
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; RV32I-LABEL: fence_acquire:
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; RV32I: # %bb.0:
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; RV32I-NEXT: fence r, rw
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: fence_acquire:
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; RV64I: # %bb.0:
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; RV64I-NEXT: fence r, rw
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; RV64I-NEXT: ret
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fence acquire
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ret void
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}
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define void @fence_release() nounwind {
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; RV32I-LABEL: fence_release:
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; RV32I: # %bb.0:
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; RV32I-NEXT: fence rw, w
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: fence_release:
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; RV64I: # %bb.0:
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; RV64I-NEXT: fence rw, w
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; RV64I-NEXT: ret
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fence release
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ret void
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}
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define void @fence_acq_rel() nounwind {
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; RV32I-LABEL: fence_acq_rel:
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; RV32I: # %bb.0:
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; RV32I-NEXT: fence.tso
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: fence_acq_rel:
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; RV64I: # %bb.0:
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; RV64I-NEXT: fence.tso
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; RV64I-NEXT: ret
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fence acq_rel
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ret void
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}
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define void @fence_seq_cst() nounwind {
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; RV32I-LABEL: fence_seq_cst:
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; RV32I: # %bb.0:
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; RV32I-NEXT: fence rw, rw
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: fence_seq_cst:
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; RV64I: # %bb.0:
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; RV64I-NEXT: fence rw, rw
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; RV64I-NEXT: ret
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fence seq_cst
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ret void
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}
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