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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 05:23:45 +02:00
llvm-mirror/test/CodeGen
Clement Courbet 8e62ffe24e add skylake
llvm-svn: 300962
2017-04-21 09:21:01 +00:00
..
AArch64 Revert r300932 and r300930. 2017-04-21 01:31:50 +00:00
AMDGPU CodeGen: Let frame index value type match alloca addr space 2017-04-20 18:15:34 +00:00
ARM ARM: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:56:52 +00:00
AVR [AVR] Remove the 'multibyte' asm test 2017-04-19 12:13:45 +00:00
BPF [bpf] Fix memory offset check for loads and stores 2017-04-13 22:24:13 +00:00
Generic [Hexagon] Unxfail passing tests 2017-04-13 16:05:35 +00:00
Hexagon [Hexagon] Generate proper offset in opt-addr-mode 2017-04-19 15:15:51 +00:00
Inputs
Lanai
Mips [mips][msa] Mask vectors holding shift amounts 2017-04-20 13:26:46 +00:00
MIR MIR: Allow parsing of empty machine functions 2017-04-11 19:32:41 +00:00
MSP430
NVPTX Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
PowerPC [DAG] add splat vector support for 'xor' in SimplifyDemandedBits 2017-04-19 21:23:09 +00:00
SPARC
SystemZ Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
Thumb [Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing Uses = [CPSR] 2017-04-21 07:35:21 +00:00
Thumb2 Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
WebAssembly [WebAssembly] Fix WebAssemblyOptimizeReturned after r300367 2017-04-17 21:40:28 +00:00
WinEH
X86 add skylake 2017-04-21 09:21:01 +00:00
XCore