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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/test/CodeGen
Craig Topper 28ac0f3baa [X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1.
Still a little room for improvement by using movlps to store to
the stack temporary needed to move data out of the xmm register
after the load.
2020-02-23 15:11:38 -08:00
..
AArch64 [AArch64] Update new test. 2020-02-23 19:13:13 +00:00
AMDGPU Revert "[AMDGPU] Don’t marke the .note section as ALLOC" 2020-02-21 16:08:30 -08:00
ARC
ARM
AVR
BPF
Generic
Hexagon [Hexagon] Introduce noop intrinsic to cast between vector predicate types 2020-02-21 07:37:59 -06:00
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC [XCOFF][AIX] Put undefined symbol name into StringTable when neccessary 2020-02-21 18:18:31 +00:00
RISCV
SPARC
SystemZ [SystemZ] Support the kernel back chain. 2020-02-23 13:42:36 -08:00
Thumb
Thumb2
VE
WebAssembly
WinCFGuard
WinEH
X86 [X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1. 2020-02-23 15:11:38 -08:00
XCore [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00