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d57759f053
Even though the implementation in emitAtomicCmpSwapW() was correct, it made Valgrind report an error. Instead of using a RISBG on CmpVal, an LL[CH]R can be made on the OldVal, and the problem is avoided. Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D97604
56 lines
1.3 KiB
LLVM
56 lines
1.3 KiB
LLVM
; Test proper extension of 8-bit/16-bit cmpxchg.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; CHECK-LABEL: f1
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; CHECK: crjlh
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; CHECK-NOT: llcr
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; CHECK-NOT: cr
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; CHECK: llgfr %r2, [[RES:%r[0-9]+]]
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; CHECK-NOT: llcr
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; CHECK-NOT: cr
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define zeroext i8 @f1(i8* nocapture, i8 zeroext, i8 zeroext) {
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%cx = cmpxchg i8* %0, i8 %1, i8 %2 seq_cst seq_cst
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%res = extractvalue { i8, i1 } %cx, 0
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ret i8 %res
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}
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; CHECK-LABEL: f2
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; CHECK: crjlh
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; CHECK-NOT: llhr
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; CHECK-NOT: cr
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; CHECK: llgfr %r2, [[RES:%r[0-9]+]]
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; CHECK-NOT: llhr
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; CHECK-NOT: cr
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define zeroext i16 @f2(i16* nocapture, i16 zeroext, i16 zeroext) {
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%cx = cmpxchg i16* %0, i16 %1, i16 %2 seq_cst seq_cst
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%res = extractvalue { i16, i1 } %cx, 0
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ret i16 %res
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}
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; CHECK-LABEL: f3
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; CHECK: crjlh
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; CHECK-NOT: llcr
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; CHECK-NOT: cr
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; CHECK: lgbr %r2, [[RES:%r[0-9]+]]
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; CHECK-NOT: llcr
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; CHECK-NOT: cr
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define signext i8 @f3(i8* nocapture, i8 signext, i8 signext) {
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%cx = cmpxchg i8* %0, i8 %1, i8 %2 seq_cst seq_cst
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%res = extractvalue { i8, i1 } %cx, 0
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ret i8 %res
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}
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; CHECK-LABEL: f4
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; CHECK: crjlh
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; CHECK-NOT: llhr
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; CHECK-NOT: cr
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; CHECK: lghr %r2, [[RES:%r[0-9]+]]
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; CHECK-NOT: llhr
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; CHECK-NOT: cr
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define signext i16 @f4(i16* nocapture, i16 signext, i16 signext) {
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%cx = cmpxchg i16* %0, i16 %1, i16 %2 seq_cst seq_cst
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%res = extractvalue { i16, i1 } %cx, 0
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ret i16 %res
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}
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