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Before MASSV only supported P8 and P9 on AIX ans Linux . This patch proposes MASSV to add support of P7 and P10 only on AIX too. Differential: https://reviews.llvm.org/D106678
77 lines
4.1 KiB
LLVM
77 lines
4.1 KiB
LLVM
; RUN: opt -vector-library=SVML -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,SVML
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; RUN: opt -vector-library=SVML -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,SVML
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; RUN: opt -vector-library=MASSV -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,MASSV
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; RUN: opt -vector-library=MASSV -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,MASSV
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; RUN: opt -vector-library=Accelerate -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,ACCELERATE
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; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,LIBMVEC-X86
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; RUN: opt -vector-library=LIBMVEC-X86 -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,LIBMVEC-X86
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; RUN: opt -vector-library=Accelerate -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,ACCELERATE
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; COMMON-LABEL: @llvm.compiler.used = appending global
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; SVML-SAME: [6 x i8*] [
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; SVML-SAME: i8* bitcast (<2 x double> (<2 x double>)* @__svml_sin2 to i8*),
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; SVML-SAME: i8* bitcast (<4 x double> (<4 x double>)* @__svml_sin4 to i8*),
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; SVML-SAME: i8* bitcast (<8 x double> (<8 x double>)* @__svml_sin8 to i8*),
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; SVML-SAME: i8* bitcast (<4 x float> (<4 x float>)* @__svml_log10f4 to i8*),
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; SVML-SAME: i8* bitcast (<8 x float> (<8 x float>)* @__svml_log10f8 to i8*),
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; SVML-SAME: i8* bitcast (<16 x float> (<16 x float>)* @__svml_log10f16 to i8*)
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; MASSV-SAME: [2 x i8*] [
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; MASSV-SAME: i8* bitcast (<2 x double> (<2 x double>)* @__sind2 to i8*),
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; MASSV-SAME: i8* bitcast (<4 x float> (<4 x float>)* @__log10f4 to i8*)
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; ACCELERATE-SAME: [1 x i8*] [
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; ACCELERATE-SAME: i8* bitcast (<4 x float> (<4 x float>)* @vlog10f to i8*)
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; LIBMVEC-X86-SAME: [2 x i8*] [
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; LIBMVEC-X86-SAME: i8* bitcast (<2 x double> (<2 x double>)* @_ZGVbN2v_sin to i8*),
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; LIBMVEC-X86-SAME: i8* bitcast (<4 x double> (<4 x double>)* @_ZGVdN4v_sin to i8*)
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; COMMON-SAME: ], section "llvm.metadata"
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define double @sin_f64(double %in) {
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; COMMON-LABEL: @sin_f64(
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; SVML: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
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; MASSV: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
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; ACCELERATE: call double @sin(double %{{.*}})
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; LIBMVEC-X86: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
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; No mapping of "sin" to a vector function for Accelerate.
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; ACCELERATE-NOT: _ZGV_LLVM_{{.*}}_sin({{.*}})
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%call = tail call double @sin(double %in)
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ret double %call
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}
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declare double @sin(double) #0
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define float @call_llvm.log10.f32(float %in) {
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; COMMON-LABEL: @call_llvm.log10.f32(
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; SVML: call float @llvm.log10.f32(float %{{.*}})
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; LIBMVEC-X86: call float @llvm.log10.f32(float %{{.*}})
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; MASSV: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
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; ACCELERATE: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
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; No mapping of "llvm.log10.f32" to a vector function for SVML.
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; SVML-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
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; LIBMVEC-X86-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
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%call = tail call float @llvm.log10.f32(float %in)
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ret float %call
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}
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declare float @llvm.log10.f32(float) #0
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attributes #0 = { nounwind readnone }
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; SVML: attributes #[[SIN]] = { "vector-function-abi-variant"=
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; SVML-SAME: "_ZGV_LLVM_N2v_sin(__svml_sin2),
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; SVML-SAME: _ZGV_LLVM_N4v_sin(__svml_sin4),
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; SVML-SAME: _ZGV_LLVM_N8v_sin(__svml_sin8)" }
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; MASSV: attributes #[[SIN]] = { "vector-function-abi-variant"=
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; MASSV-SAME: "_ZGV_LLVM_N2v_sin(__sind2)" }
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; MASSV: attributes #[[LOG10]] = { "vector-function-abi-variant"=
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; MASSV-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(__log10f4)" }
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; ACCELERATE: attributes #[[LOG10]] = { "vector-function-abi-variant"=
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; ACCELERATE-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(vlog10f)" }
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; LIBMVEC-X86: attributes #[[SIN]] = { "vector-function-abi-variant"=
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; LIBMVEC-X86-SAME: "_ZGV_LLVM_N2v_sin(_ZGVbN2v_sin),
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; LIBMVEC-X86-SAME: _ZGV_LLVM_N4v_sin(_ZGVdN4v_sin)" }
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