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a64641fbd2
ppcf128 to i32 conversion and expand it into a code sequence like in LegalizeDAG. This needs custom ppc lowering of FP_ROUND_INREG, so turn that on and make it work with LegalizeTypes. Probably PPC should simply custom lower the original conversion. llvm-svn: 58329
34 lines
1.2 KiB
LLVM
34 lines
1.2 KiB
LLVM
; RUN: llvm-as < %s | llc -march=ppc32 -o - | not grep fixunstfsi
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define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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entry:
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%0 = fcmp olt ppc_fp128 %a, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
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br i1 %0, label %bb5, label %bb1
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bb1: ; preds = %entry
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%1 = mul ppc_fp128 %a, 0xM3DF00000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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%2 = fptoui ppc_fp128 %1 to i32 ; <i32> [#uses=1]
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%3 = zext i32 %2 to i64 ; <i64> [#uses=1]
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%4 = shl i64 %3, 32 ; <i64> [#uses=3]
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%5 = uitofp i64 %4 to ppc_fp128 ; <ppc_fp128> [#uses=1]
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%6 = sub ppc_fp128 %a, %5 ; <ppc_fp128> [#uses=3]
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%7 = fcmp olt ppc_fp128 %6, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
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br i1 %7, label %bb2, label %bb3
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bb2: ; preds = %bb1
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%8 = sub ppc_fp128 0xM80000000000000000000000000000000, %6 ; <ppc_fp128> [#uses=1]
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%9 = fptoui ppc_fp128 %8 to i32 ; <i32> [#uses=1]
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%10 = zext i32 %9 to i64 ; <i64> [#uses=1]
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%11 = sub i64 %4, %10 ; <i64> [#uses=1]
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ret i64 %11
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bb3: ; preds = %bb1
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%12 = fptoui ppc_fp128 %6 to i32 ; <i32> [#uses=1]
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%13 = zext i32 %12 to i64 ; <i64> [#uses=1]
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%14 = or i64 %13, %4 ; <i64> [#uses=1]
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ret i64 %14
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bb5: ; preds = %entry
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ret i64 0
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}
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