Ayke van Laethem 350598f8a1 [AVR] Don't adjust addresses by 2 for absolute values ... Adjusting by 2 breaks DWARF output. With this fix, programs start to compile and produce valid DWARF output. Differential Revision: https://reviews.llvm.org/D74213		2020-02-26 20:32:24 +01:00
..
out-of-range-fixups
dwarf-asm-no-code.s
inst-adc.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-add.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-adiw.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-and.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-andi.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-asr.s
inst-bld.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-brbc.s
inst-brbs.s
inst-break.s
inst-bst.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-call.s
inst-cbi.s
inst-cbr.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-clr.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-com.s
inst-cp.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-cpc.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-cpi.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-cpse.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-dec.s
inst-des.s
inst-eicall.s
inst-eijmp.s
inst-elpm.s
inst-eor.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-family-cond-branch.s
inst-family-set-clr-flag.s
inst-fmul.s
inst-fmuls.s
inst-fmulsu.s
inst-icall.s
inst-ijmp.s
inst-in.s
inst-inc.s
inst-jmp.s
inst-lac.s
inst-las.s
inst-lat.s
inst-ld.s
inst-ldd.s
inst-ldi.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-lds.s
inst-lpm.s
inst-lsl.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-lsr.s
inst-mov.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-movw.s
inst-mul.s
inst-muls.s
inst-mulsu.s
inst-neg.s
inst-nop.s
inst-or.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-ori.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-out.s
inst-pop.s
inst-push.s
inst-rcall.s
inst-ret.s
inst-reti.s
inst-rjmp.s
inst-rol.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-ror.s
inst-sbc.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-sbci.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-sbi.s
inst-sbic.s
inst-sbis.s
inst-sbiw.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-sbr.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-sbrc.s
inst-sbrs.s
inst-ser.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-sleep.s
inst-spm.s
inst-st.s
inst-std.s
inst-sts.s
inst-sub.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-subi.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-swap.s
inst-tst.s	[AVR] Disassemble register operands	2020-02-24 19:35:51 +01:00
inst-wdr.s
inst-xch.s
lit.local.cfg
modifiers.s
relocations-abs.s	[AVR] Don't adjust addresses by 2 for absolute values	2020-02-26 20:32:24 +01:00
relocations.s
symbol_relocation.s
syntax-reg-int-literal.s
syntax-reg-pair.s