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3ad4a89e80
This adds support for printing improved missing feature error messages from the assembler, which now indicates which feature caused the parse to fail. Differential Revision: https://reviews.llvm.org/D69899
52 lines
2.5 KiB
ArmAsm
52 lines
2.5 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -mattr=+d -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d < %s \
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# RUN: | llvm-objdump -mattr=+d -M no-aliases -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
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#
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# RUN: not llvm-mc -triple riscv32 -mattr=+d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=CHECK-RV32 %s
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# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, dyn
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# CHECK-ASM: encoding: [0x53,0x75,0x20,0xc2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.l.d a0, ft0, dyn
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# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, dyn
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# CHECK-ASM: encoding: [0xd3,0xf5,0x30,0xc2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.lu.d a1, ft1, dyn
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# CHECK-ASM-AND-OBJ: fmv.x.d a2, ft2
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# CHECK-ASM: encoding: [0x53,0x06,0x01,0xe2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fmv.x.d a2, ft2
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# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, dyn
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# CHECK-ASM: encoding: [0xd3,0xf1,0x26,0xd2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.d.l ft3, a3, dyn
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# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, dyn
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# CHECK-ASM: encoding: [0x53,0x72,0x37,0xd2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.d.lu ft4, a4, dyn
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# CHECK-ASM-AND-OBJ: fmv.d.x ft5, a5
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# CHECK-ASM: encoding: [0xd3,0x82,0x07,0xf2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fmv.d.x ft5, a5
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# Rounding modes
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# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, rne
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# CHECK-ASM: encoding: [0xd3,0x81,0x26,0xd2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.d.l ft3, a3, rne
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# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, rtz
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# CHECK-ASM: encoding: [0x53,0x12,0x37,0xd2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.d.lu ft4, a4, rtz
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# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, rdn
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# CHECK-ASM: encoding: [0x53,0x25,0x20,0xc2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.l.d a0, ft0, rdn
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# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, rup
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# CHECK-ASM: encoding: [0xd3,0xb5,0x30,0xc2]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
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fcvt.lu.d a1, ft1, rup
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