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c75e6e294f
This patch adds proper handling of -target-abi, as accepted by llvm-mc and llc. Lowering (codegen) for the hard-float ABIs will follow in a subsequent patch. However, this patch does add MC layer support for the hard float and RVE ABIs (emission of the appropriate ELF flags https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#-file-header). ABI parsing must be shared between codegen and the MC layer, so we add computeTargetABI to RISCVUtils. A warning will be printed if an invalid or unrecognized ABI is given. Differential Revision: https://reviews.llvm.org/D59023 llvm-svn: 355771 |
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| .. | ||
| AArch64 | ||
| AMDGPU | ||
| ARM | ||
| AsmParser | ||
| AVR | ||
| BPF | ||
| COFF | ||
| Disassembler | ||
| ELF | ||
| Hexagon | ||
| Lanai | ||
| MachO | ||
| Mips | ||
| MSP430 | ||
| PowerPC | ||
| RISCV | ||
| Sparc | ||
| SystemZ | ||
| WebAssembly | ||
| X86 | ||