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Summary: Add regression tests of asmparser, mccodeemitter, and disassembler for transfer control instructions. Add FENCEI/FENCEM/FENCEC/SVOB instructions also. Add new instruction format to represent FENCE* instructions too. Differential Revision: https://reviews.llvm.org/D81440
9 lines
334 B
ArmAsm
9 lines
334 B
ArmAsm
# RUN: llvm-mc -triple=ve --show-encoding < %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
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# RUN: | FileCheck %s --check-prefixes=CHECK-INST
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# CHECK-INST: svob
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30]
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svob
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