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c882b11e5d
If during scheduling we have identified that we cannot keep optimistic occupancy increase critical register pressure limit and try scheduling of the whole function again. In this case blocks with smaller pressure will have a chance for better scheduling. Differential Revision: https://reviews.llvm.org/D30442 llvm-svn: 296506
108 lines
3.2 KiB
C++
108 lines
3.2 KiB
C++
//===-- GCNSchedStrategy.h - GCN Scheduler Strategy -*- C++ -*-------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
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#define LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
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#include "llvm/CodeGen/MachineScheduler.h"
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namespace llvm {
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class SIMachineFunctionInfo;
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class SIRegisterInfo;
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class SISubtarget;
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/// This is a minimal scheduler strategy. The main difference between this
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/// and the GenericScheduler is that GCNSchedStrategy uses different
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/// heuristics to determine excess/critical pressure sets. Its goal is to
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/// maximize kernel occupancy (i.e. maximum number of waves per simd).
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class GCNMaxOccupancySchedStrategy : public GenericScheduler {
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friend class GCNScheduleDAGMILive;
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SUnit *pickNodeBidirectional(bool &IsTopNode);
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void pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy,
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const RegPressureTracker &RPTracker,
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SchedCandidate &Cand);
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void initCandidate(SchedCandidate &Cand, SUnit *SU,
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bool AtTop, const RegPressureTracker &RPTracker,
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const SIRegisterInfo *SRI,
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unsigned SGPRPressure, unsigned VGPRPressure);
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unsigned SGPRExcessLimit;
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unsigned VGPRExcessLimit;
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unsigned SGPRCriticalLimit;
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unsigned VGPRCriticalLimit;
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unsigned TargetOccupancy;
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MachineFunction *MF;
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public:
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GCNMaxOccupancySchedStrategy(const MachineSchedContext *C);
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SUnit *pickNode(bool &IsTopNode) override;
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void initialize(ScheduleDAGMI *DAG) override;
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};
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class GCNScheduleDAGMILive : public ScheduleDAGMILive {
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const SISubtarget &ST;
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const SIMachineFunctionInfo &MFI;
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// Occupancy target at the begining of function scheduling cycle.
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unsigned StartingOccupancy;
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// Minimal real occupancy recorder for the function.
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unsigned MinOccupancy;
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// Scheduling stage number.
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unsigned Stage;
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// Vecor of regions recorder for later rescheduling
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SmallVector<std::pair<const MachineBasicBlock::iterator,
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const MachineBasicBlock::iterator>, 32> Regions;
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// Region live-ins.
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DenseMap<unsigned, LaneBitmask> LiveIns;
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// Number of live-ins to the current region, first SGPR then VGPR.
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std::pair<unsigned, unsigned> LiveInPressure;
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// Collect current region live-ins.
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void discoverLiveIns();
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// Return current region pressure. First value is SGPR number, second is VGPR.
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std::pair<unsigned, unsigned> getRealRegPressure() const;
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public:
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GCNScheduleDAGMILive(MachineSchedContext *C,
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std::unique_ptr<MachineSchedStrategy> S);
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void enterRegion(MachineBasicBlock *bb,
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MachineBasicBlock::iterator begin,
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MachineBasicBlock::iterator end,
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unsigned regioninstrs) override;
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void schedule() override;
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void finalizeSchedule() override;
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};
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} // End namespace llvm
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#endif // GCNSCHEDSTRATEGY_H
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