Matt Arsenault 426c222888 AMDGPU: Remove -mcpu=SI ... Leftover from before amdgcn/r600 split. llvm-svn: 310277		2017-08-07 18:30:35 +00:00
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AArch64	[AArch64] Tie source and destination operands for AESMC/AESIMC.	2017-07-29 20:35:28 +00:00
AMDGPU	AMDGPU: Remove -mcpu=SI	2017-08-07 18:30:35 +00:00
ARM	[ARM] Fix assembly and disassembly for VMRS/VMSR	2017-08-07 08:41:05 +00:00
AsmParser	[AsmParser][GAS-compatibility] Ignore an empty 'p2align' directive	2017-08-02 17:36:10 +00:00
AVR	[AVR] Remove a bunch of now-obselete tests	2017-07-01 05:23:13 +00:00
COFF	[codeview] Change readobj symbol dumping format	2017-07-11 23:41:41 +00:00
Disassembler	[AMDGPU][MC] Corrected VOP3 version of v_interp_* instructions for VI	2017-08-07 13:14:12 +00:00
ELF	Don't pass the code model to MC	2017-08-02 20:32:26 +00:00
Hexagon	[Hexagon] Handle a global operand to A2_addi when creating duplexes	2017-06-22 15:53:31 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	IR: Replace the "Linker Options" module flag with "llvm.linker.options" named metadata.	2017-06-12 20:10:48 +00:00
Markup
Mips	Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""	2017-07-14 15:08:05 +00:00
PowerPC	[Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.	2017-06-12 17:58:42 +00:00
Sparc	[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed	2017-07-25 15:28:28 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] Expose the offset of each data segment	2017-07-12 00:24:54 +00:00
X86	X86 Asm uses assertions instead of proper diagnostic. This patch fixes that.	2017-07-25 13:05:12 +00:00