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AArch64
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Change how we iterate over relocations on ELF.
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2013-05-30 03:05:14 +00:00 |
ARM
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Cortex-R5 can issue Thumb2 integer division instructions.
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2013-06-04 22:52:09 +00:00 |
CPP
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Generic
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Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.
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2013-05-21 14:37:16 +00:00 |
Hexagon
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Hexagon: Pass to replace tranfer/copy instructions into combine instruction
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2013-05-14 18:54:06 +00:00 |
Inputs
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Revert "Adding DIImportedModules to DIScopes."
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2013-03-28 02:44:59 +00:00 |
MBlaze
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Remove unnecessary leading comment characters in lit-only file
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2013-03-18 22:08:16 +00:00 |
Mips
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[mips] brcond + setgt/setugt instruction selection patterns.
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2013-06-05 19:49:55 +00:00 |
MSP430
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DAGCombiner: Simplify inverted bit tests
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2013-05-08 06:44:42 +00:00 |
NVPTX
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[NVPTX] Re-enable support for virtual registers in the final output
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2013-05-31 12:14:49 +00:00 |
PowerPC
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Change how we iterate over relocations on ELF.
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2013-05-30 03:05:14 +00:00 |
R600
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R600: Add a pass that merge Vector Register
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2013-06-05 21:38:04 +00:00 |
SI
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SPARC
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Sparc: Add support for indirect branch and blockaddress in Sparc backend.
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2013-06-03 05:58:33 +00:00 |
SystemZ
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[SystemZ] Don't use LOAD and STORE REVERSED for volatile accesses
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2013-05-31 13:25:22 +00:00 |
Thumb
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LocalStackSlotAllocation improvements
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2013-04-30 20:04:37 +00:00 |
Thumb2
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Cortex-R5 can issue Thumb2 integer division instructions.
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2013-06-04 22:52:09 +00:00 |
X86
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[PATCH] Fix VGATHER* operand constraints
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2013-06-05 18:12:26 +00:00 |
XCore
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[XCore] Fix handling of functions where only the LR is spilled.
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2013-05-09 16:43:42 +00:00 |