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https://github.com/RPCS3/llvm-mirror.git
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c7dbf2fe82
Re-enable commit r323991 now that r325931 has been committed to make MachineOperand::isRenamable() check more conservative w.r.t. code changes and opt-in on a per-target basis. llvm-svn: 326208
312 lines
10 KiB
LLVM
312 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32 < %s | FileCheck %s -check-prefixes=MIPS32
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; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=MIPS32R2
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; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 < %s | FileCheck %s -check-prefixes=MIPS32r6
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 < %s | FileCheck %s -check-prefixes=MIPS4
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 < %s | FileCheck %s -check-prefixes=MIPS64
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=MIPS64R2
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 < %s | FileCheck %s -check-prefixes=MIPS64R6
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define double @foo(double %a, double %b) nounwind readnone {
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; MIPS32-LABEL: foo:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: mtc1 $zero, $f2
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; MIPS32-NEXT: mtc1 $zero, $f3
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; MIPS32-NEXT: c.ule.d $f12, $f2
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; MIPS32-NEXT: bc1f $BB0_2
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; MIPS32-NEXT: mov.d $f0, $f12
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; MIPS32-NEXT: # %bb.1: # %if.else
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; MIPS32-NEXT: mtc1 $zero, $f0
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; MIPS32-NEXT: mtc1 $zero, $f1
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; MIPS32-NEXT: c.ule.d $f14, $f0
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; MIPS32-NEXT: bc1t $BB0_3
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; MIPS32-NEXT: nop
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; MIPS32-NEXT: $BB0_2: # %if.end6
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; MIPS32-NEXT: sub.d $f0, $f14, $f0
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; MIPS32-NEXT: add.d $f0, $f0, $f0
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; MIPS32-NEXT: $BB0_3: # %return
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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;
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; MIPS32R2-LABEL: foo:
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; MIPS32R2: # %bb.0: # %entry
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; MIPS32R2-NEXT: mov.d $f0, $f12
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; MIPS32R2-NEXT: mtc1 $zero, $f2
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; MIPS32R2-NEXT: mthc1 $zero, $f2
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; MIPS32R2-NEXT: c.ule.d $f12, $f2
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; MIPS32R2-NEXT: bc1f $BB0_2
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; MIPS32R2-NEXT: nop
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; MIPS32R2-NEXT: # %bb.1: # %if.else
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; MIPS32R2-NEXT: mtc1 $zero, $f0
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; MIPS32R2-NEXT: mthc1 $zero, $f0
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; MIPS32R2-NEXT: c.ule.d $f14, $f0
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; MIPS32R2-NEXT: bc1t $BB0_3
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; MIPS32R2-NEXT: nop
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; MIPS32R2-NEXT: $BB0_2: # %if.end6
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; MIPS32R2-NEXT: sub.d $f0, $f14, $f0
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; MIPS32R2-NEXT: add.d $f0, $f0, $f0
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; MIPS32R2-NEXT: $BB0_3: # %return
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: nop
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;
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; MIPS32r6-LABEL: foo:
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; MIPS32r6: # %bb.0: # %entry
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; MIPS32r6-NEXT: mov.d $f0, $f12
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; MIPS32r6-NEXT: mtc1 $zero, $f1
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; MIPS32r6-NEXT: mthc1 $zero, $f1
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; MIPS32r6-NEXT: cmp.lt.d $f1, $f1, $f12
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; MIPS32r6-NEXT: mfc1 $1, $f1
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; MIPS32r6-NEXT: andi $1, $1, 1
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; MIPS32r6-NEXT: bnezc $1, $BB0_2
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; MIPS32r6-NEXT: # %bb.1: # %if.else
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; MIPS32r6-NEXT: mtc1 $zero, $f0
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; MIPS32r6-NEXT: mthc1 $zero, $f0
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; MIPS32r6-NEXT: cmp.ule.d $f1, $f14, $f0
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; MIPS32r6-NEXT: mfc1 $1, $f1
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; MIPS32r6-NEXT: andi $1, $1, 1
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; MIPS32r6-NEXT: bnezc $1, $BB0_3
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; MIPS32r6-NEXT: $BB0_2: # %if.end6
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; MIPS32r6-NEXT: sub.d $f0, $f14, $f0
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; MIPS32r6-NEXT: add.d $f0, $f0, $f0
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; MIPS32r6-NEXT: $BB0_3: # %return
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; MIPS32r6-NEXT: jrc $ra
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;
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; MIPS4-LABEL: foo:
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; MIPS4: # %bb.0: # %entry
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; MIPS4-NEXT: dmtc1 $zero, $f1
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; MIPS4-NEXT: c.ule.d $f12, $f1
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; MIPS4-NEXT: bc1f .LBB0_2
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; MIPS4-NEXT: mov.d $f0, $f12
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; MIPS4-NEXT: # %bb.1: # %if.else
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; MIPS4-NEXT: dmtc1 $zero, $f0
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; MIPS4-NEXT: c.ule.d $f13, $f0
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; MIPS4-NEXT: bc1t .LBB0_3
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; MIPS4-NEXT: nop
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; MIPS4-NEXT: .LBB0_2: # %if.end6
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; MIPS4-NEXT: sub.d $f0, $f13, $f0
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; MIPS4-NEXT: add.d $f0, $f0, $f0
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; MIPS4-NEXT: .LBB0_3: # %return
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; MIPS4-NEXT: jr $ra
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; MIPS4-NEXT: nop
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;
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; MIPS64-LABEL: foo:
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; MIPS64: # %bb.0: # %entry
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; MIPS64-NEXT: dmtc1 $zero, $f1
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; MIPS64-NEXT: c.ule.d $f12, $f1
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; MIPS64-NEXT: bc1f .LBB0_2
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; MIPS64-NEXT: mov.d $f0, $f12
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; MIPS64-NEXT: # %bb.1: # %if.else
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; MIPS64-NEXT: dmtc1 $zero, $f0
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; MIPS64-NEXT: c.ule.d $f13, $f0
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; MIPS64-NEXT: bc1t .LBB0_3
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; MIPS64-NEXT: nop
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; MIPS64-NEXT: .LBB0_2: # %if.end6
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; MIPS64-NEXT: sub.d $f0, $f13, $f0
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; MIPS64-NEXT: add.d $f0, $f0, $f0
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; MIPS64-NEXT: .LBB0_3: # %return
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: nop
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;
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; MIPS64R2-LABEL: foo:
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; MIPS64R2: # %bb.0: # %entry
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; MIPS64R2-NEXT: dmtc1 $zero, $f1
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; MIPS64R2-NEXT: c.ule.d $f12, $f1
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; MIPS64R2-NEXT: bc1f .LBB0_2
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; MIPS64R2-NEXT: mov.d $f0, $f12
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; MIPS64R2-NEXT: # %bb.1: # %if.else
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; MIPS64R2-NEXT: dmtc1 $zero, $f0
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; MIPS64R2-NEXT: c.ule.d $f13, $f0
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; MIPS64R2-NEXT: bc1t .LBB0_3
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; MIPS64R2-NEXT: nop
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; MIPS64R2-NEXT: .LBB0_2: # %if.end6
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; MIPS64R2-NEXT: sub.d $f0, $f13, $f0
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; MIPS64R2-NEXT: add.d $f0, $f0, $f0
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; MIPS64R2-NEXT: .LBB0_3: # %return
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: nop
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;
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; MIPS64R6-LABEL: foo:
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; MIPS64R6: # %bb.0: # %entry
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; MIPS64R6-NEXT: dmtc1 $zero, $f1
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; MIPS64R6-NEXT: cmp.lt.d $f1, $f1, $f12
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; MIPS64R6-NEXT: mfc1 $1, $f1
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; MIPS64R6-NEXT: andi $1, $1, 1
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; MIPS64R6-NEXT: bnez $1, .LBB0_2
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; MIPS64R6-NEXT: mov.d $f0, $f12
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; MIPS64R6-NEXT: # %bb.1: # %if.else
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; MIPS64R6-NEXT: dmtc1 $zero, $f0
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; MIPS64R6-NEXT: cmp.ule.d $f1, $f13, $f0
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; MIPS64R6-NEXT: mfc1 $1, $f1
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; MIPS64R6-NEXT: andi $1, $1, 1
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; MIPS64R6-NEXT: bnezc $1, .LBB0_3
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; MIPS64R6-NEXT: .LBB0_2: # %if.end6
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; MIPS64R6-NEXT: sub.d $f0, $f13, $f0
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; MIPS64R6-NEXT: add.d $f0, $f0, $f0
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; MIPS64R6-NEXT: .LBB0_3: # %return
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; MIPS64R6-NEXT: jrc $ra
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entry:
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%cmp = fcmp ogt double %a, 0.000000e+00
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br i1 %cmp, label %if.end6, label %if.else
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if.else: ; preds = %entry
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%cmp3 = fcmp ogt double %b, 0.000000e+00
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br i1 %cmp3, label %if.end6, label %return
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if.end6: ; preds = %if.else, %entry
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%c.0 = phi double [ %a, %entry ], [ 0.000000e+00, %if.else ]
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%sub = fsub double %b, %c.0
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%mul = fmul double %sub, 2.000000e+00
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br label %return
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return: ; preds = %if.else, %if.end6
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%retval.0 = phi double [ %mul, %if.end6 ], [ 0.000000e+00, %if.else ]
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ret double %retval.0
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}
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define void @f1(float %f) nounwind {
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; MIPS32-LABEL: f1:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $sp, $sp, -24
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; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; MIPS32-NEXT: mtc1 $zero, $f0
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; MIPS32-NEXT: c.eq.s $f12, $f0
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; MIPS32-NEXT: bc1f $BB1_2
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; MIPS32-NEXT: nop
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; MIPS32-NEXT: # %bb.1: # %if.end
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; MIPS32-NEXT: jal f2
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; MIPS32-NEXT: nop
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; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: addiu $sp, $sp, 24
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; MIPS32-NEXT: $BB1_2: # %if.then
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; MIPS32-NEXT: jal abort
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; MIPS32-NEXT: nop
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;
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; MIPS32R2-LABEL: f1:
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; MIPS32R2: # %bb.0: # %entry
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; MIPS32R2-NEXT: addiu $sp, $sp, -24
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; MIPS32R2-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; MIPS32R2-NEXT: mtc1 $zero, $f0
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; MIPS32R2-NEXT: c.eq.s $f12, $f0
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; MIPS32R2-NEXT: bc1f $BB1_2
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; MIPS32R2-NEXT: nop
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; MIPS32R2-NEXT: # %bb.1: # %if.end
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; MIPS32R2-NEXT: jal f2
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; MIPS32R2-NEXT: nop
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; MIPS32R2-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: addiu $sp, $sp, 24
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; MIPS32R2-NEXT: $BB1_2: # %if.then
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; MIPS32R2-NEXT: jal abort
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; MIPS32R2-NEXT: nop
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;
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; MIPS32r6-LABEL: f1:
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; MIPS32r6: # %bb.0: # %entry
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; MIPS32r6-NEXT: addiu $sp, $sp, -24
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; MIPS32r6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; MIPS32r6-NEXT: mtc1 $zero, $f0
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; MIPS32r6-NEXT: cmp.eq.s $f0, $f12, $f0
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; MIPS32r6-NEXT: mfc1 $1, $f0
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; MIPS32r6-NEXT: andi $1, $1, 1
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; MIPS32r6-NEXT: beqzc $1, $BB1_2
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; MIPS32r6-NEXT: nop
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; MIPS32r6-NEXT: # %bb.1: # %if.end
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; MIPS32r6-NEXT: jal f2
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; MIPS32r6-NEXT: nop
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; MIPS32r6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; MIPS32r6-NEXT: jr $ra
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; MIPS32r6-NEXT: addiu $sp, $sp, 24
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; MIPS32r6-NEXT: $BB1_2: # %if.then
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; MIPS32r6-NEXT: jal abort
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; MIPS32r6-NEXT: nop
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;
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; MIPS4-LABEL: f1:
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; MIPS4: # %bb.0: # %entry
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; MIPS4-NEXT: daddiu $sp, $sp, -16
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; MIPS4-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; MIPS4-NEXT: mtc1 $zero, $f0
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; MIPS4-NEXT: c.eq.s $f12, $f0
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; MIPS4-NEXT: bc1f .LBB1_2
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; MIPS4-NEXT: nop
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; MIPS4-NEXT: # %bb.1: # %if.end
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; MIPS4-NEXT: jal f2
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; MIPS4-NEXT: nop
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; MIPS4-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; MIPS4-NEXT: jr $ra
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; MIPS4-NEXT: daddiu $sp, $sp, 16
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; MIPS4-NEXT: .LBB1_2: # %if.then
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; MIPS4-NEXT: jal abort
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; MIPS4-NEXT: nop
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;
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; MIPS64-LABEL: f1:
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; MIPS64: # %bb.0: # %entry
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; MIPS64-NEXT: daddiu $sp, $sp, -16
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; MIPS64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; MIPS64-NEXT: mtc1 $zero, $f0
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; MIPS64-NEXT: c.eq.s $f12, $f0
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; MIPS64-NEXT: bc1f .LBB1_2
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; MIPS64-NEXT: nop
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; MIPS64-NEXT: # %bb.1: # %if.end
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; MIPS64-NEXT: jal f2
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; MIPS64-NEXT: nop
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; MIPS64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: daddiu $sp, $sp, 16
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; MIPS64-NEXT: .LBB1_2: # %if.then
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; MIPS64-NEXT: jal abort
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; MIPS64-NEXT: nop
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;
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; MIPS64R2-LABEL: f1:
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; MIPS64R2: # %bb.0: # %entry
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; MIPS64R2-NEXT: daddiu $sp, $sp, -16
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; MIPS64R2-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; MIPS64R2-NEXT: mtc1 $zero, $f0
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; MIPS64R2-NEXT: c.eq.s $f12, $f0
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; MIPS64R2-NEXT: bc1f .LBB1_2
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; MIPS64R2-NEXT: nop
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; MIPS64R2-NEXT: # %bb.1: # %if.end
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; MIPS64R2-NEXT: jal f2
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; MIPS64R2-NEXT: nop
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; MIPS64R2-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: daddiu $sp, $sp, 16
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; MIPS64R2-NEXT: .LBB1_2: # %if.then
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; MIPS64R2-NEXT: jal abort
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; MIPS64R2-NEXT: nop
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;
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; MIPS64R6-LABEL: f1:
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; MIPS64R6: # %bb.0: # %entry
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; MIPS64R6-NEXT: daddiu $sp, $sp, -16
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; MIPS64R6-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; MIPS64R6-NEXT: mtc1 $zero, $f0
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; MIPS64R6-NEXT: cmp.eq.s $f0, $f12, $f0
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; MIPS64R6-NEXT: mfc1 $1, $f0
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; MIPS64R6-NEXT: andi $1, $1, 1
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; MIPS64R6-NEXT: beqzc $1, .LBB1_2
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; MIPS64R6-NEXT: nop
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; MIPS64R6-NEXT: # %bb.1: # %if.end
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; MIPS64R6-NEXT: jal f2
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; MIPS64R6-NEXT: nop
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; MIPS64R6-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: daddiu $sp, $sp, 16
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; MIPS64R6-NEXT: .LBB1_2: # %if.then
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; MIPS64R6-NEXT: jal abort
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; MIPS64R6-NEXT: nop
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entry:
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%cmp = fcmp une float %f, 0.000000e+00
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @abort() noreturn
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unreachable
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if.end: ; preds = %entry
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tail call void (...) @f2() nounwind
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ret void
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}
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declare void @abort() noreturn nounwind
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declare void @f2(...)
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