1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
llvm-mirror/test/TableGen/cond-inheritance.td
Javed Absar 173ca6da08 [TblGen] Extend !if semantics through new feature !cond
This patch extends TableGen language with !cond operator.
Instead of embedding !if inside !if which can get cumbersome,
one can now use !cond.
Below is an example to convert an integer 'x' into a string:

    !cond(!lt(x,0) : "Negative",
          !eq(x,0) : "Zero",
          !eq(x,1) : "One,
          1        : "MoreThanOne")

Reviewed By: hfinkel, simon_tatham, greened
Differential Revision: https://reviews.llvm.org/D55758

llvm-svn: 352185
2019-01-25 10:25:25 +00:00

23 lines
409 B
TableGen

// Make sure !cond gets propagated across multiple layers of inheritance.
// RUN: llvm-tblgen %s | FileCheck %s
// XFAIL: vg_leak
class getInt<int c> {
int ret = !cond(c: 0, 1 : 1);
}
class I1<int c> {
int i = getInt<c>.ret;
}
class I2<int c> : I1<c>;
def DI1: I1<1>;
// CHECK: def DI1 { // I1
// CHECK-NEXT: int i = 0;
// CHECK: def DI2 { // I1 I2
// CHECK-NEXT: int i = 0;
def DI2: I2<1>;