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Daniel Sanders 9102aa35bd [globalisel] Tablegen-erate current Register Bank Information
Summary:
Adds a RegisterBank tablegen class that can be used to declare the register
banks and an associated tablegen pass to generate the necessary code.

Reviewers: t.p.northover, ab, rovka, qcolombet

Subscribers: aditya_nandakumar, rengolin, kristof.beyls, vkalintiris, mgorny, dberris, llvm-commits, rovka

Differential Revision: https://reviews.llvm.org/D27338

llvm-svn: 292132
2017-01-16 15:20:43 +00:00
bindings
cmake Add a LLVM_USE_LINKER that defines the linker to use when building LLVM 2017-01-15 03:21:30 +00:00
docs [NVPTX] Let there be One True Way to set NVVMReflect params. 2017-01-15 16:54:35 +00:00
examples
include [globalisel] Tablegen-erate current Register Bank Information 2017-01-16 15:20:43 +00:00
lib [globalisel] Tablegen-erate current Register Bank Information 2017-01-16 15:20:43 +00:00
llvm/Target/GlobalISel [globalisel] Tablegen-erate current Register Bank Information 2017-01-16 15:20:43 +00:00
projects
resources
runtimes
test Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence." 2017-01-16 15:01:07 +00:00
tools Fix un-initialized error introduced by r291959. 2017-01-15 16:42:36 +00:00
unittests DWARFDebugInfoTest.cpp: Don't use ArrayRef with initializer. It was allocated locally. 2017-01-16 14:33:37 +00:00
utils [globalisel] Tablegen-erate current Register Bank Information 2017-01-16 15:20:43 +00:00
.arcconfig
.clang-format
.clang-tidy
.gitignore
CMakeLists.txt Bump trunk version to 5.0.0svn 2017-01-12 21:22:36 +00:00
CODE_OWNERS.TXT
configure
CREDITS.TXT
LICENSE.TXT Bump year to 2017 in LICENSE.txt 2017-01-12 18:02:42 +00:00
llvm.spec.in
LLVMBuild.txt
README.txt
RELEASE_TESTERS.TXT

Low Level Virtual Machine (LLVM)
================================

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Please see the documentation provided in docs/ for further
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