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llvm-svn: 186280
96 lines
2.9 KiB
LLVM
96 lines
2.9 KiB
LLVM
;Check 5.5 Parameter Passing --> Stage C --> C.4 statement, when NSAA is not
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;equal to SP.
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;
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; Our purpose: make NSAA != SP, and only after start to use GPRs.
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;
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;Co-Processor register candidates may be either in VFP or in stack, so after
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;all VFP are allocated, stack is used. We can use stack without GPR allocation
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;in that case, passing 9 f64 params, for example.
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;First eight params goes to d0-d7, ninth one goes to the stack.
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;Now, as 10th parameter, we pass i32, and it must go to R0.
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;
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;5.5 Parameter Passing, Stage C:
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;
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;C.2.cp If the argument is a CPRC then any co-processor registers in that class
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;that are unallocated are marked as unavailable. The NSAA is adjusted upwards
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;until it is correctly aligned for the argument and the argument is copied to
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;the memory at the adjusted NSAA. The NSAA is further incremented by the size
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;of the argument. The argument has now been allocated.
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;...
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;C.4 If the size in words of the argument is not more than r4 minus NCRN, the
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;argument is copied into core registers, starting at the NCRN. The NCRN is
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;incremented by the number of registers used. Successive registers hold the
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;parts of the argument they would hold if its value were loaded into those
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;registers from memory using an LDM instruction. The argument has now been
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;allocated.
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;
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;What is actually checked here:
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;Here we check that i32 param goes to r0.
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;
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;Current test-case was produced with command:
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;arm-linux-gnueabihf-clang -mcpu=cortex-a9 params-to-GPR.c -S -O1 -emit-llvm
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;
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;// params-to-GRP.c:
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;
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;void fooUseI32(unsigned);
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;
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;void foo(long double p0,
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; long double p1,
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; long double p2,
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; long double p3,
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; long double p4,
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; long double p5,
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; long double p6,
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; long double p7,
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; long double p8,
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; unsigned p9) {
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; fooUseI32(p9);
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;}
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;
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;void doFoo() {
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; foo( 1,2,3,4,5,6,7,8,9, 43 );
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;}
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;RUN: llc -mtriple=thumbv7-linux-gnueabihf -float-abi=hard < %s | FileCheck %s
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;
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;CHECK-LABEL: foo:
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;CHECK-NOT: mov r0
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;CHECK-NOT: ldr r0
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;CHECK: bl fooUseI32
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;CHECK-LABEL: doFoo:
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;CHECK: movs r0, #43
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;CHECK: bl foo
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define void @foo(double %p0, ; --> D0
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double %p1, ; --> D1
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double %p2, ; --> D2
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double %p3, ; --> D3
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double %p4, ; --> D4
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double %p5, ; --> D5
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double %p6, ; --> D6
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double %p7, ; --> D7
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double %p8, ; --> Stack
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i32 %p9) #0 { ; --> R0, not Stack+8
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entry:
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tail call void @fooUseI32(i32 %p9)
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ret void
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}
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declare void @fooUseI32(i32)
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define void @doFoo() {
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entry:
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tail call void @foo(double 23.0, ; --> D0
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double 23.1, ; --> D1
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double 23.2, ; --> D2
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double 23.3, ; --> D3
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double 23.4, ; --> D4
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double 23.5, ; --> D5
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double 23.6, ; --> D6
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double 23.7, ; --> D7
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double 23.8, ; --> Stack
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i32 43) ; --> R0, not Stack+8
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ret void
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}
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