mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-21 03:53:04 +02:00
bf6282b7aa
Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252910
102 lines
2.6 KiB
LLVM
102 lines
2.6 KiB
LLVM
; RUN: llc < %s -asm-verbose=false | FileCheck %s
|
|
|
|
; Test that basic 64-bit integer comparison operations assemble as expected.
|
|
|
|
target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
|
target triple = "wasm32-unknown-unknown"
|
|
|
|
; CHECK-LABEL: eq_i64:
|
|
; CHECK-NEXT: .param i64{{$}}
|
|
; CHECK-NEXT: .param i64{{$}}
|
|
; CHECK-NEXT: .result i32{{$}}
|
|
; CHECK-NEXT: .local i64, i64, i32{{$}}
|
|
; CHECK-NEXT: i64.eq $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
; CHECK-NEXT: return (get_local 2){{$}}
|
|
define i32 @eq_i64(i64 %x, i64 %y) {
|
|
%a = icmp eq i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: ne_i64:
|
|
; CHECK: i64.ne $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @ne_i64(i64 %x, i64 %y) {
|
|
%a = icmp ne i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: slt_i64:
|
|
; CHECK: i64.lt_s $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @slt_i64(i64 %x, i64 %y) {
|
|
%a = icmp slt i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: sle_i64:
|
|
; CHECK: i64.le_s $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @sle_i64(i64 %x, i64 %y) {
|
|
%a = icmp sle i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: ult_i64:
|
|
; CHECK: i64.lt_u $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @ult_i64(i64 %x, i64 %y) {
|
|
%a = icmp ult i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: ule_i64:
|
|
; CHECK: i64.le_u $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @ule_i64(i64 %x, i64 %y) {
|
|
%a = icmp ule i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: sgt_i64:
|
|
; CHECK: i64.gt_s $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @sgt_i64(i64 %x, i64 %y) {
|
|
%a = icmp sgt i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: sge_i64:
|
|
; CHECK: i64.ge_s $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @sge_i64(i64 %x, i64 %y) {
|
|
%a = icmp sge i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: ugt_i64:
|
|
; CHECK: i64.gt_u $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @ugt_i64(i64 %x, i64 %y) {
|
|
%a = icmp ugt i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|
|
|
|
; CHECK-LABEL: uge_i64:
|
|
; CHECK: i64.ge_u $push, (get_local 0), (get_local 1){{$}}
|
|
; CHECK-NEXT: set_local 2, $pop{{$}}
|
|
define i32 @uge_i64(i64 %x, i64 %y) {
|
|
%a = icmp uge i64 %x, %y
|
|
%b = zext i1 %a to i32
|
|
ret i32 %b
|
|
}
|