Jay Foad ccd7445730 [AMDGPU] getMemOperandsWithOffset: add resource operand for BUF instructions ... Summary: This prevents unwanted clustering of BUF instructions with the same vaddr but different resource descriptors. Reviewers: rampitec, arsenm, nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73867		2020-02-03 17:06:09 +00:00
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AArch64	[FPEnv][AArch64] Add lowering of f128 STRICT_FSETCC	2020-02-03 14:39:16 +00:00
AMDGPU	[AMDGPU] getMemOperandsWithOffset: add resource operand for BUF instructions	2020-02-03 17:06:09 +00:00
ARC
ARM	[FPEnv][ARM] Add lowering of STRICT_FSETCC and STRICT_FSETCCS	2020-02-03 12:59:12 +00:00
AVR
BPF	[BPF] fix a bug in BPFMISimplifyPatchable pass with -O0	2020-01-30 08:28:39 -08:00
Generic	[CodeGenPrepare] Make TargetPassConfig required	2020-02-02 09:28:45 -08:00
Hexagon
Inputs
Lanai
Mips	Don't mark MIPS TRAP as isTerminator	2020-02-01 15:50:22 +00:00
MIR
MSP430
NVPTX
PowerPC	[CodeGenPrepare] Make TargetPassConfig required	2020-02-02 09:28:45 -08:00
RISCV	[TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits already match the sign bit	2020-01-25 17:36:46 +00:00
SPARC
SystemZ
Thumb
Thumb2	[ARM,MVE] Fix vreinterpretq in big-endian mode.	2020-02-03 11:20:06 +00:00
VE	[VE] (fp)trunc+store & load+(fp)ext isel	2020-02-03 16:55:44 +01:00
WebAssembly	[WebAssembly] Preserve debug frame base information through register coloring	2020-01-28 16:58:15 -08:00
WinCFGuard
WinEH
X86	[TargetLowering] SimplifyDemandedBits - add basic KnownBits ZEXTLoad handling	2020-02-03 16:50:04 +00:00
XCore