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llvm-mirror/test/tools/llvm-mca
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Andrea Di Biagio 681b643c07 [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322). 
This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367

(cherry picked from commit 7a1a35a1d1ae2e69769505c9f39910067c53d53b)
2021-08-11 21:40:03 -07:00
..
AArch64 [AArch64] Update Cortex-A55 SchedModel to improve LDP scheduling 2021-07-16 12:00:57 +01:00
AMDGPU Revert "[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions." 2021-07-07 20:48:42 -07:00
ARM [MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs. 2021-06-15 09:52:38 +01:00
JSON/X86 [llvm-mca][JSON] Store extra information about driver flags used for the simulation 2021-07-16 09:18:40 +02:00
SystemZ
X86 [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322). 2021-08-11 21:40:03 -07:00
invalid_input_file_name.test [test] Use host platform specific error message substitution in lit tests 2021-01-29 07:16:30 -05:00
lit.local.cfg