1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen/ARM/movt.ll
Saleem Abdulrasool 859dccec1f ARM: update even more tests
More updating of tests to be explicit about the target triple rather than
relying on the default target triple supporting ARM mode.

Indicate to lit that object emission is not yet available for Windows on ARM.

llvm-svn: 205545
2014-04-03 17:35:22 +00:00

20 lines
374 B
LLVM

; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; rdar://7317664
define i32 @t(i32 %X) nounwind {
; CHECK-LABEL: t:
; CHECK: movt r0, #65535
entry:
%0 = or i32 %X, -65536
ret i32 %0
}
define i32 @t2(i32 %X) nounwind {
; CHECK-LABEL: t2:
; CHECK: movt r0, #65534
entry:
%0 = or i32 %X, -131072
%1 = and i32 %0, -65537
ret i32 %1
}