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llvm-mirror/test/TableGen/intrinsic-varargs.td
Matt Arsenault 422c27e8aa TableGen: Allow setting SDNodeProperties on intrinsics
Allows preserving MachineMemOperands on intrinsics
through selection. For reasons I don't understand, this
is a static property of the pattern and the selector
deliberately goes out of its way to drop if not present.

Intrinsics already inherit from SDPatternOperator allowing
them to be used directly in instruction patterns. SDPatternOperator
has a list of SDNodeProperty, but you currently can't set them on
the intrinsic. Without SDNPMemOperand, when the node is selected
any memory operands are always dropped. Allowing setting this
on the intrinsics avoids needing to introduce another equivalent
target node just to have SDNPMemOperand set.

llvm-svn: 321212
2017-12-20 19:36:28 +00:00

33 lines
851 B
TableGen

// RUN: llvm-tblgen -gen-intrinsic %s | FileCheck %s
// XFAIL: vg_leak
class IntrinsicProperty;
class SDNodeProperty;
class ValueType<int size, int value> {
string Namespace = "MVT";
int Size = size;
int Value = value;
}
class LLVMType<ValueType vt> {
ValueType VT = vt;
}
class Intrinsic<string name, list<LLVMType> param_types = []> {
string LLVMName = name;
bit isTarget = 0;
string TargetPrefix = "";
list<LLVMType> RetTypes = [];
list<LLVMType> ParamTypes = param_types;
list<IntrinsicProperty> IntrProperties = [];
list<SDNodeProperty> Properties = [];
}
// isVoid needs to match the definition in ValueTypes.td
def isVoid : ValueType<0, 111>; // Produces no value
def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
// CHECK: /* 0 */ 0, 29, 0,
def int_foo : Intrinsic<"llvm.foo", [llvm_vararg_ty]>;