..
AsmParser
[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
2016-08-16 17:14:44 +00:00
Disassembler
MCTargetDesc
[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
2016-08-19 15:17:19 +00:00
TargetInfo
BitTracker.cpp
[Hexagon] Remove unnecessary llvm::, NFC
2016-08-19 14:10:57 +00:00
BitTracker.h
[Hexagon-ish] Add function to print cell map contents in bit tracker
2016-08-03 18:13:32 +00:00
CMakeLists.txt
[Hexagon] Delete HexagonSelectCCInfo.td
2016-08-10 16:23:53 +00:00
Hexagon.h
Hexagon.td
[Hexagon] Add target feature to generate long calls
2016-07-25 14:42:11 +00:00
HexagonAsmPrinter.cpp
[Hexagon] Fix indentation, NFC
2016-08-19 14:12:51 +00:00
HexagonAsmPrinter.h
HexagonBitSimplify.cpp
[Hexagon] Standardize next batch of pseudo instructions
2016-08-16 18:08:40 +00:00
HexagonBitTracker.cpp
[Hexagon] Handle J2_jumptpt and J2_jumpfpt instructions
2016-08-19 14:14:09 +00:00
HexagonBitTracker.h
Hexagon: Avoid implicit iterator conversions, NFC
2016-07-12 01:55:32 +00:00
HexagonBlockRanges.cpp
Use the range variant of find/find_if instead of unpacking begin/end
2016-08-12 03:55:06 +00:00
HexagonBlockRanges.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
HexagonBranchRelaxation.cpp
[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
2016-07-29 21:49:42 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonCommonGEP.cpp
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
HexagonConstPropagation.cpp
[Hexagon] Standardize next batch of pseudo instructions
2016-08-16 18:08:40 +00:00
HexagonCopyToCombine.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonEarlyIfConv.cpp
[Hexagon] Standardize "select" pseudo-instructions
2016-08-11 19:12:18 +00:00
HexagonExpandCondsets.cpp
[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
2016-08-24 22:27:36 +00:00
HexagonFixupHwLoops.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonFrameLowering.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonFrameLowering.h
[Hexagon] Check for offset overflow when reserving scavenging slots
2016-08-01 17:15:30 +00:00
HexagonGenExtract.cpp
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
HexagonGenInsert.cpp
Use the range variant of remove_if instead of unpacking begin/end
2016-08-12 04:32:37 +00:00
HexagonGenMux.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonGenPredicate.cpp
Hexagon: Avoid implicit iterator conversions, NFC
2016-07-12 01:55:32 +00:00
HexagonHardwareLoops.cpp
MachineLoop: add methods findLoopControlBlock and findLoopPreheader
2016-08-15 08:22:42 +00:00
HexagonHazardRecognizer.cpp
[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
2016-07-29 21:49:42 +00:00
HexagonHazardRecognizer.h
Fix license information in the file header
2016-07-29 14:04:17 +00:00
HexagonInstrAlias.td
[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
2016-08-16 17:14:44 +00:00
HexagonInstrEnc.td
HexagonInstrFormats.td
[Hexagon] Update instruction itineraries
2016-07-15 16:58:34 +00:00
HexagonInstrFormatsV4.td
[Hexagon] Update instruction itineraries
2016-07-15 16:58:34 +00:00
HexagonInstrFormatsV60.td
HexagonInstrInfo.cpp
[Hexagon] Fix subesthetic indentation
2016-08-19 19:29:15 +00:00
HexagonInstrInfo.h
[Hexagon] Allow non-returning calls in hardware loops
2016-08-11 21:14:25 +00:00
HexagonInstrInfo.td
[Hexagon] Do not cache alloca instructions during isel
2016-08-19 18:46:13 +00:00
HexagonInstrInfoV3.td
[Hexagon] Standardize pseudo-instructions for calls and returns
2016-08-12 11:12:02 +00:00
HexagonInstrInfoV4.td
[Hexagon] Fix incorrect generation of S4_subi_asl_ri
2016-08-19 16:35:05 +00:00
HexagonInstrInfoV5.td
[Hexagon] Improvements to handling and generation of FP instructions
2016-08-19 13:34:31 +00:00
HexagonInstrInfoV60.td
[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
2016-08-16 17:14:44 +00:00
HexagonInstrInfoVector.td
[Hexagon] Standardize next batch of pseudo instructions
2016-08-16 18:08:40 +00:00
HexagonIntrinsics.td
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
2016-08-16 17:14:44 +00:00
HexagonISelDAGToDAG.cpp
[Hexagon] Fix subesthetic indentation
2016-08-19 19:29:15 +00:00
HexagonISelLowering.cpp
[Hexagon] Fix subesthetic indentation
2016-08-19 19:29:15 +00:00
HexagonISelLowering.h
[Hexagon] Do not cache alloca instructions during isel
2016-08-19 18:46:13 +00:00
HexagonIsetDx.td
[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
2016-08-19 15:17:19 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
[Hexagon] Do not cache alloca instructions during isel
2016-08-19 18:46:13 +00:00
HexagonMachineScheduler.cpp
Move helpers into anonymous namespaces. NFC.
2016-08-06 11:13:10 +00:00
HexagonMachineScheduler.h
Use the range variant of find instead of unpacking begin/end
2016-08-11 22:21:41 +00:00
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonOperands.td
[Hexagon] Improve patterns with stack-based addressing
2016-07-15 15:35:52 +00:00
HexagonOptAddrMode.cpp
[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
2016-07-29 21:49:42 +00:00
HexagonOptimizeSZextends.cpp
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
HexagonPeephole.cpp
[Hexagon] Clear kill flags from modified registers in peephole optimizer
2016-08-04 14:17:16 +00:00
HexagonRDF.cpp
HexagonRDF.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
HexagonRDFOpt.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonRegisterInfo.cpp
[Hexagon] Improvements to handling and generation of FP instructions
2016-08-19 13:34:31 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
[Hexagon] Minor updates to register definitions
2016-08-19 16:40:19 +00:00
HexagonSchedule.td
HexagonScheduleV4.td
[Hexagon] Update instruction itineraries
2016-07-15 16:58:34 +00:00
HexagonScheduleV55.td
[Hexagon] Update instruction itineraries
2016-07-15 16:58:34 +00:00
HexagonScheduleV60.td
[Hexagon] Update instruction itineraries
2016-07-15 16:58:34 +00:00
HexagonSelectionDAGInfo.cpp
[Hexagon] Add target feature to generate long calls
2016-07-25 14:42:11 +00:00
HexagonSelectionDAGInfo.h
[Hexagon] Add explicit default constructor for HexagonSelectionDAGInfo
2016-08-19 15:13:54 +00:00
HexagonSplitConst32AndConst64.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonSplitDouble.cpp
Replace a few more "fall through" comments with LLVM_FALLTHROUGH
2016-08-17 20:30:52 +00:00
HexagonStoreWidening.cpp
HexagonSubtarget.cpp
[Hexagon] Enable subregister liveness tracking
2016-08-24 17:17:39 +00:00
HexagonSubtarget.h
[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
2016-07-29 21:49:42 +00:00
HexagonSystemInst.td
HexagonTargetMachine.cpp
[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
2016-08-24 22:27:36 +00:00
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp
[Hexagon] Consider zext/sext of a load to i32 to be free
2016-08-19 14:22:07 +00:00
HexagonTargetTransformInfo.h
[Hexagon] Consider zext/sext of a load to i32 to be free
2016-08-19 14:22:07 +00:00
HexagonVectorPrint.cpp
Hexagon: Use llvm_unreachable. NFC.
2016-08-03 15:51:10 +00:00
HexagonVLIWPacketizer.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
HexagonVLIWPacketizer.h
[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
2016-07-29 21:49:42 +00:00
LLVMBuild.txt
[Hexagon] Make HexagonCodeGen depend on Scalar
2016-07-22 17:23:46 +00:00
RDFCopy.cpp
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFCopy.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFDeadCode.cpp
RDFDeadCode.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFGraph.cpp
Use range algorithms instead of unpacking begin/end
2016-08-11 21:15:00 +00:00
RDFGraph.h
[RDF] Make the graph construction/use less expensive
2016-07-22 16:09:47 +00:00
RDFLiveness.cpp
Use range algorithms instead of unpacking begin/end
2016-08-11 21:15:00 +00:00
RDFLiveness.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00