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llvm-mirror/test/CodeGen
Xiangling Liao 930ceb8d4e [AIX] Lowering jump table, constant pool and block address in asm
This patch lowering jump table, constant pool and block address in assembly.
1. On AIX, jump table index is always relative;
2. Put CPI and JTI into ReadOnlySection until we support unique data sections;
3. Create the temp symbol for block address symbol;
4. Update MIR testcases and add related assembly part;

Differential Revision: https://reviews.llvm.org/D70243
2019-11-20 10:27:15 -05:00
..
AArch64 [CodeGen][NFC] Regenerate load-combine test with update_llc_test. 2019-11-20 13:27:31 +01:00
AMDGPU [AMDGPU] add support for hostcall buffer pointer as hidden kernel argument 2019-11-20 15:53:55 +05:30
ARC
ARM [CodeGen][NFC] Regenerate load-combine test with update_llc_test. 2019-11-20 13:27:31 +01:00
AVR
BPF
Generic
Hexagon
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC [AIX] Lowering jump table, constant pool and block address in asm 2019-11-20 10:27:15 -05:00
RISCV
SPARC
SystemZ [LegalizeDAG] Convert strict fp nodes to libcalls without losing the chain. 2019-11-18 11:24:08 -08:00
Thumb
Thumb2 [ARM][MVE] Select vqabs 2019-11-20 13:58:38 +00:00
WebAssembly
WinCFGuard
WinEH
X86 [SelectionDAG] Combine U{ADD,SUB}O diamonds into {ADD,SUB}CARRY 2019-11-20 16:25:42 +02:00
XCore