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7806a32f60
Summary: Added file headers for files which implement iterative lightweight scheduling strategies. Which is basically an exercise which I undertook in order to get used to LLVM development process. Reviewers: arsenm, vpykhtin, cdevadas Reviewed By: vpykhtin Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, javed.absar, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73417
620 lines
21 KiB
C++
620 lines
21 KiB
C++
//===- GCNIterativeScheduler.cpp ------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements the class GCNIterativeScheduler.
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///
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//===----------------------------------------------------------------------===//
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#include "GCNIterativeScheduler.h"
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#include "AMDGPUSubtarget.h"
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#include "GCNRegPressure.h"
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#include "GCNSchedStrategy.h"
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#include "SIMachineFunctionInfo.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/RegisterPressure.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/Config/llvm-config.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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#include <cassert>
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#include <iterator>
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#include <limits>
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#include <memory>
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#include <type_traits>
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#include <vector>
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using namespace llvm;
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#define DEBUG_TYPE "machine-scheduler"
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namespace llvm {
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std::vector<const SUnit *> makeMinRegSchedule(ArrayRef<const SUnit *> TopRoots,
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const ScheduleDAG &DAG);
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std::vector<const SUnit*> makeGCNILPScheduler(ArrayRef<const SUnit*> BotRoots,
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const ScheduleDAG &DAG);
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}
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// shim accessors for different order containers
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static inline MachineInstr *getMachineInstr(MachineInstr *MI) {
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return MI;
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}
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static inline MachineInstr *getMachineInstr(const SUnit *SU) {
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return SU->getInstr();
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}
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static inline MachineInstr *getMachineInstr(const SUnit &SU) {
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return SU.getInstr();
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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LLVM_DUMP_METHOD
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static void printRegion(raw_ostream &OS,
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MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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const LiveIntervals *LIS,
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unsigned MaxInstNum =
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std::numeric_limits<unsigned>::max()) {
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auto BB = Begin->getParent();
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OS << BB->getParent()->getName() << ":" << printMBBReference(*BB) << ' '
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<< BB->getName() << ":\n";
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auto I = Begin;
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MaxInstNum = std::max(MaxInstNum, 1u);
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for (; I != End && MaxInstNum; ++I, --MaxInstNum) {
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if (!I->isDebugInstr() && LIS)
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OS << LIS->getInstructionIndex(*I);
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OS << '\t' << *I;
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}
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if (I != End) {
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OS << "\t...\n";
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I = std::prev(End);
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if (!I->isDebugInstr() && LIS)
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OS << LIS->getInstructionIndex(*I);
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OS << '\t' << *I;
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}
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if (End != BB->end()) { // print boundary inst if present
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OS << "----\n";
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if (LIS) OS << LIS->getInstructionIndex(*End) << '\t';
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OS << *End;
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}
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}
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LLVM_DUMP_METHOD
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static void printLivenessInfo(raw_ostream &OS,
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MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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const LiveIntervals *LIS) {
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const auto BB = Begin->getParent();
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const auto &MRI = BB->getParent()->getRegInfo();
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const auto LiveIns = getLiveRegsBefore(*Begin, *LIS);
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OS << "LIn RP: ";
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getRegPressure(MRI, LiveIns).print(OS);
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const auto BottomMI = End == BB->end() ? std::prev(End) : End;
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const auto LiveOuts = getLiveRegsAfter(*BottomMI, *LIS);
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OS << "LOt RP: ";
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getRegPressure(MRI, LiveOuts).print(OS);
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}
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LLVM_DUMP_METHOD
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void GCNIterativeScheduler::printRegions(raw_ostream &OS) const {
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const auto &ST = MF.getSubtarget<GCNSubtarget>();
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for (const auto R : Regions) {
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OS << "Region to schedule ";
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printRegion(OS, R->Begin, R->End, LIS, 1);
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printLivenessInfo(OS, R->Begin, R->End, LIS);
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OS << "Max RP: ";
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R->MaxPressure.print(OS, &ST);
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}
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}
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LLVM_DUMP_METHOD
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void GCNIterativeScheduler::printSchedResult(raw_ostream &OS,
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const Region *R,
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const GCNRegPressure &RP) const {
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OS << "\nAfter scheduling ";
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printRegion(OS, R->Begin, R->End, LIS);
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printSchedRP(OS, R->MaxPressure, RP);
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OS << '\n';
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}
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LLVM_DUMP_METHOD
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void GCNIterativeScheduler::printSchedRP(raw_ostream &OS,
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const GCNRegPressure &Before,
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const GCNRegPressure &After) const {
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const auto &ST = MF.getSubtarget<GCNSubtarget>();
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OS << "RP before: ";
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Before.print(OS, &ST);
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OS << "RP after: ";
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After.print(OS, &ST);
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}
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#endif
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// DAG builder helper
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class GCNIterativeScheduler::BuildDAG {
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GCNIterativeScheduler &Sch;
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SmallVector<SUnit *, 8> TopRoots;
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SmallVector<SUnit*, 8> BotRoots;
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public:
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BuildDAG(const Region &R, GCNIterativeScheduler &_Sch)
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: Sch(_Sch) {
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auto BB = R.Begin->getParent();
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Sch.BaseClass::startBlock(BB);
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Sch.BaseClass::enterRegion(BB, R.Begin, R.End, R.NumRegionInstrs);
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Sch.buildSchedGraph(Sch.AA, nullptr, nullptr, nullptr,
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/*TrackLaneMask*/true);
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Sch.Topo.InitDAGTopologicalSorting();
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Sch.findRootsAndBiasEdges(TopRoots, BotRoots);
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}
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~BuildDAG() {
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Sch.BaseClass::exitRegion();
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Sch.BaseClass::finishBlock();
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}
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ArrayRef<const SUnit *> getTopRoots() const {
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return TopRoots;
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}
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ArrayRef<SUnit*> getBottomRoots() const {
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return BotRoots;
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}
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};
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class GCNIterativeScheduler::OverrideLegacyStrategy {
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GCNIterativeScheduler &Sch;
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Region &Rgn;
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std::unique_ptr<MachineSchedStrategy> SaveSchedImpl;
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GCNRegPressure SaveMaxRP;
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public:
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OverrideLegacyStrategy(Region &R,
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MachineSchedStrategy &OverrideStrategy,
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GCNIterativeScheduler &_Sch)
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: Sch(_Sch)
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, Rgn(R)
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, SaveSchedImpl(std::move(_Sch.SchedImpl))
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, SaveMaxRP(R.MaxPressure) {
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Sch.SchedImpl.reset(&OverrideStrategy);
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auto BB = R.Begin->getParent();
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Sch.BaseClass::startBlock(BB);
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Sch.BaseClass::enterRegion(BB, R.Begin, R.End, R.NumRegionInstrs);
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}
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~OverrideLegacyStrategy() {
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Sch.BaseClass::exitRegion();
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Sch.BaseClass::finishBlock();
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Sch.SchedImpl.release();
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Sch.SchedImpl = std::move(SaveSchedImpl);
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}
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void schedule() {
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assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End);
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LLVM_DEBUG(dbgs() << "\nScheduling ";
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printRegion(dbgs(), Rgn.Begin, Rgn.End, Sch.LIS, 2));
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Sch.BaseClass::schedule();
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// Unfortunatelly placeDebugValues incorrectly modifies RegionEnd, restore
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Sch.RegionEnd = Rgn.End;
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//assert(Rgn.End == Sch.RegionEnd);
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Rgn.Begin = Sch.RegionBegin;
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Rgn.MaxPressure.clear();
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}
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void restoreOrder() {
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assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End);
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// DAG SUnits are stored using original region's order
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// so just use SUnits as the restoring schedule
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Sch.scheduleRegion(Rgn, Sch.SUnits, SaveMaxRP);
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}
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};
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namespace {
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// just a stub to make base class happy
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class SchedStrategyStub : public MachineSchedStrategy {
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public:
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bool shouldTrackPressure() const override { return false; }
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bool shouldTrackLaneMasks() const override { return false; }
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void initialize(ScheduleDAGMI *DAG) override {}
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SUnit *pickNode(bool &IsTopNode) override { return nullptr; }
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void schedNode(SUnit *SU, bool IsTopNode) override {}
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void releaseTopNode(SUnit *SU) override {}
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void releaseBottomNode(SUnit *SU) override {}
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};
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} // end anonymous namespace
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GCNIterativeScheduler::GCNIterativeScheduler(MachineSchedContext *C,
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StrategyKind S)
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: BaseClass(C, std::make_unique<SchedStrategyStub>())
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, Context(C)
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, Strategy(S)
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, UPTracker(*LIS) {
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}
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// returns max pressure for a region
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GCNRegPressure
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GCNIterativeScheduler::getRegionPressure(MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End)
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const {
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// For the purpose of pressure tracking bottom inst of the region should
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// be also processed. End is either BB end, BB terminator inst or sched
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// boundary inst.
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auto const BBEnd = Begin->getParent()->end();
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auto const BottomMI = End == BBEnd ? std::prev(End) : End;
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// scheduleRegions walks bottom to top, so its likely we just get next
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// instruction to track
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auto AfterBottomMI = std::next(BottomMI);
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if (AfterBottomMI == BBEnd ||
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&*AfterBottomMI != UPTracker.getLastTrackedMI()) {
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UPTracker.reset(*BottomMI);
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} else {
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assert(UPTracker.isValid());
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}
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for (auto I = BottomMI; I != Begin; --I)
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UPTracker.recede(*I);
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UPTracker.recede(*Begin);
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assert(UPTracker.isValid() ||
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(dbgs() << "Tracked region ",
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printRegion(dbgs(), Begin, End, LIS), false));
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return UPTracker.moveMaxPressure();
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}
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// returns max pressure for a tentative schedule
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template <typename Range> GCNRegPressure
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GCNIterativeScheduler::getSchedulePressure(const Region &R,
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Range &&Schedule) const {
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auto const BBEnd = R.Begin->getParent()->end();
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GCNUpwardRPTracker RPTracker(*LIS);
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if (R.End != BBEnd) {
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// R.End points to the boundary instruction but the
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// schedule doesn't include it
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RPTracker.reset(*R.End);
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RPTracker.recede(*R.End);
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} else {
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// R.End doesn't point to the boundary instruction
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RPTracker.reset(*std::prev(BBEnd));
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}
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for (auto I = Schedule.end(), B = Schedule.begin(); I != B;) {
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RPTracker.recede(*getMachineInstr(*--I));
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}
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return RPTracker.moveMaxPressure();
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}
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void GCNIterativeScheduler::enterRegion(MachineBasicBlock *BB, // overriden
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MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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unsigned NumRegionInstrs) {
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BaseClass::enterRegion(BB, Begin, End, NumRegionInstrs);
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if (NumRegionInstrs > 2) {
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Regions.push_back(
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new (Alloc.Allocate())
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Region { Begin, End, NumRegionInstrs,
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getRegionPressure(Begin, End), nullptr });
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}
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}
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void GCNIterativeScheduler::schedule() { // overriden
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// do nothing
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LLVM_DEBUG(printLivenessInfo(dbgs(), RegionBegin, RegionEnd, LIS);
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if (!Regions.empty() && Regions.back()->Begin == RegionBegin) {
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dbgs() << "Max RP: ";
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Regions.back()->MaxPressure.print(
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dbgs(), &MF.getSubtarget<GCNSubtarget>());
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} dbgs()
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<< '\n';);
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}
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void GCNIterativeScheduler::finalizeSchedule() { // overriden
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if (Regions.empty())
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return;
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switch (Strategy) {
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case SCHEDULE_MINREGONLY: scheduleMinReg(); break;
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case SCHEDULE_MINREGFORCED: scheduleMinReg(true); break;
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case SCHEDULE_LEGACYMAXOCCUPANCY: scheduleLegacyMaxOccupancy(); break;
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case SCHEDULE_ILP: scheduleILP(false); break;
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}
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}
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// Detach schedule from SUnits and interleave it with debug values.
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// Returned schedule becomes independent of DAG state.
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std::vector<MachineInstr*>
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GCNIterativeScheduler::detachSchedule(ScheduleRef Schedule) const {
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std::vector<MachineInstr*> Res;
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Res.reserve(Schedule.size() * 2);
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if (FirstDbgValue)
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Res.push_back(FirstDbgValue);
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const auto DbgB = DbgValues.begin(), DbgE = DbgValues.end();
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for (auto SU : Schedule) {
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Res.push_back(SU->getInstr());
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const auto &D = std::find_if(DbgB, DbgE, [SU](decltype(*DbgB) &P) {
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return P.second == SU->getInstr();
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});
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if (D != DbgE)
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Res.push_back(D->first);
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}
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return Res;
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}
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void GCNIterativeScheduler::setBestSchedule(Region &R,
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ScheduleRef Schedule,
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const GCNRegPressure &MaxRP) {
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R.BestSchedule.reset(
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new TentativeSchedule{ detachSchedule(Schedule), MaxRP });
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}
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void GCNIterativeScheduler::scheduleBest(Region &R) {
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assert(R.BestSchedule.get() && "No schedule specified");
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scheduleRegion(R, R.BestSchedule->Schedule, R.BestSchedule->MaxPressure);
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R.BestSchedule.reset();
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}
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// minimal required region scheduler, works for ranges of SUnits*,
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// SUnits or MachineIntrs*
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template <typename Range>
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void GCNIterativeScheduler::scheduleRegion(Region &R, Range &&Schedule,
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const GCNRegPressure &MaxRP) {
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assert(RegionBegin == R.Begin && RegionEnd == R.End);
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assert(LIS != nullptr);
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#ifndef NDEBUG
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const auto SchedMaxRP = getSchedulePressure(R, Schedule);
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#endif
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auto BB = R.Begin->getParent();
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auto Top = R.Begin;
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for (const auto &I : Schedule) {
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auto MI = getMachineInstr(I);
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if (MI != &*Top) {
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BB->remove(MI);
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BB->insert(Top, MI);
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if (!MI->isDebugInstr())
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LIS->handleMove(*MI, true);
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}
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if (!MI->isDebugInstr()) {
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// Reset read - undef flags and update them later.
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for (auto &Op : MI->operands())
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if (Op.isReg() && Op.isDef())
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Op.setIsUndef(false);
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RegisterOperands RegOpers;
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RegOpers.collect(*MI, *TRI, MRI, /*ShouldTrackLaneMasks*/true,
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/*IgnoreDead*/false);
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// Adjust liveness and add missing dead+read-undef flags.
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auto SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
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RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
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}
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Top = std::next(MI->getIterator());
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}
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RegionBegin = getMachineInstr(Schedule.front());
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// Schedule consisting of MachineInstr* is considered 'detached'
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// and already interleaved with debug values
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if (!std::is_same<decltype(*Schedule.begin()), MachineInstr*>::value) {
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placeDebugValues();
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// Unfortunatelly placeDebugValues incorrectly modifies RegionEnd, restore
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//assert(R.End == RegionEnd);
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RegionEnd = R.End;
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}
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R.Begin = RegionBegin;
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R.MaxPressure = MaxRP;
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#ifndef NDEBUG
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const auto RegionMaxRP = getRegionPressure(R);
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const auto &ST = MF.getSubtarget<GCNSubtarget>();
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#endif
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assert((SchedMaxRP == RegionMaxRP && (MaxRP.empty() || SchedMaxRP == MaxRP))
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|| (dbgs() << "Max RP mismatch!!!\n"
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"RP for schedule (calculated): ",
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SchedMaxRP.print(dbgs(), &ST),
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dbgs() << "RP for schedule (reported): ",
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MaxRP.print(dbgs(), &ST),
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dbgs() << "RP after scheduling: ",
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RegionMaxRP.print(dbgs(), &ST),
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false));
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}
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// Sort recorded regions by pressure - highest at the front
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void GCNIterativeScheduler::sortRegionsByPressure(unsigned TargetOcc) {
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const auto &ST = MF.getSubtarget<GCNSubtarget>();
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llvm::sort(Regions, [&ST, TargetOcc](const Region *R1, const Region *R2) {
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return R2->MaxPressure.less(ST, R1->MaxPressure, TargetOcc);
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});
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}
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///////////////////////////////////////////////////////////////////////////////
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// Legacy MaxOccupancy Strategy
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// Tries to increase occupancy applying minreg scheduler for a sequence of
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// most demanding regions. Obtained schedules are saved as BestSchedule for a
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// region.
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// TargetOcc is the best achievable occupancy for a kernel.
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// Returns better occupancy on success or current occupancy on fail.
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// BestSchedules aren't deleted on fail.
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unsigned GCNIterativeScheduler::tryMaximizeOccupancy(unsigned TargetOcc) {
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// TODO: assert Regions are sorted descending by pressure
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const auto &ST = MF.getSubtarget<GCNSubtarget>();
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const auto Occ = Regions.front()->MaxPressure.getOccupancy(ST);
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LLVM_DEBUG(dbgs() << "Trying to improve occupancy, target = " << TargetOcc
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<< ", current = " << Occ << '\n');
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auto NewOcc = TargetOcc;
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for (auto R : Regions) {
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if (R->MaxPressure.getOccupancy(ST) >= NewOcc)
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break;
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LLVM_DEBUG(printRegion(dbgs(), R->Begin, R->End, LIS, 3);
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printLivenessInfo(dbgs(), R->Begin, R->End, LIS));
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BuildDAG DAG(*R, *this);
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const auto MinSchedule = makeMinRegSchedule(DAG.getTopRoots(), *this);
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const auto MaxRP = getSchedulePressure(*R, MinSchedule);
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LLVM_DEBUG(dbgs() << "Occupancy improvement attempt:\n";
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printSchedRP(dbgs(), R->MaxPressure, MaxRP));
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NewOcc = std::min(NewOcc, MaxRP.getOccupancy(ST));
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if (NewOcc <= Occ)
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break;
|
|
|
|
setBestSchedule(*R, MinSchedule, MaxRP);
|
|
}
|
|
LLVM_DEBUG(dbgs() << "New occupancy = " << NewOcc
|
|
<< ", prev occupancy = " << Occ << '\n');
|
|
if (NewOcc > Occ) {
|
|
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
|
|
MFI->increaseOccupancy(MF, NewOcc);
|
|
}
|
|
|
|
return std::max(NewOcc, Occ);
|
|
}
|
|
|
|
void GCNIterativeScheduler::scheduleLegacyMaxOccupancy(
|
|
bool TryMaximizeOccupancy) {
|
|
const auto &ST = MF.getSubtarget<GCNSubtarget>();
|
|
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
|
|
auto TgtOcc = MFI->getMinAllowedOccupancy();
|
|
|
|
sortRegionsByPressure(TgtOcc);
|
|
auto Occ = Regions.front()->MaxPressure.getOccupancy(ST);
|
|
|
|
if (TryMaximizeOccupancy && Occ < TgtOcc)
|
|
Occ = tryMaximizeOccupancy(TgtOcc);
|
|
|
|
// This is really weird but for some magic scheduling regions twice
|
|
// gives performance improvement
|
|
const int NumPasses = Occ < TgtOcc ? 2 : 1;
|
|
|
|
TgtOcc = std::min(Occ, TgtOcc);
|
|
LLVM_DEBUG(dbgs() << "Scheduling using default scheduler, "
|
|
"target occupancy = "
|
|
<< TgtOcc << '\n');
|
|
GCNMaxOccupancySchedStrategy LStrgy(Context);
|
|
unsigned FinalOccupancy = std::min(Occ, MFI->getOccupancy());
|
|
|
|
for (int I = 0; I < NumPasses; ++I) {
|
|
// running first pass with TargetOccupancy = 0 mimics previous scheduling
|
|
// approach and is a performance magic
|
|
LStrgy.setTargetOccupancy(I == 0 ? 0 : TgtOcc);
|
|
for (auto R : Regions) {
|
|
OverrideLegacyStrategy Ovr(*R, LStrgy, *this);
|
|
|
|
Ovr.schedule();
|
|
const auto RP = getRegionPressure(*R);
|
|
LLVM_DEBUG(printSchedRP(dbgs(), R->MaxPressure, RP));
|
|
|
|
if (RP.getOccupancy(ST) < TgtOcc) {
|
|
LLVM_DEBUG(dbgs() << "Didn't fit into target occupancy O" << TgtOcc);
|
|
if (R->BestSchedule.get() &&
|
|
R->BestSchedule->MaxPressure.getOccupancy(ST) >= TgtOcc) {
|
|
LLVM_DEBUG(dbgs() << ", scheduling minimal register\n");
|
|
scheduleBest(*R);
|
|
} else {
|
|
LLVM_DEBUG(dbgs() << ", restoring\n");
|
|
Ovr.restoreOrder();
|
|
assert(R->MaxPressure.getOccupancy(ST) >= TgtOcc);
|
|
}
|
|
}
|
|
FinalOccupancy = std::min(FinalOccupancy, RP.getOccupancy(ST));
|
|
}
|
|
}
|
|
MFI->limitOccupancy(FinalOccupancy);
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// Minimal Register Strategy
|
|
|
|
void GCNIterativeScheduler::scheduleMinReg(bool force) {
|
|
const auto &ST = MF.getSubtarget<GCNSubtarget>();
|
|
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
|
|
const auto TgtOcc = MFI->getOccupancy();
|
|
sortRegionsByPressure(TgtOcc);
|
|
|
|
auto MaxPressure = Regions.front()->MaxPressure;
|
|
for (auto R : Regions) {
|
|
if (!force && R->MaxPressure.less(ST, MaxPressure, TgtOcc))
|
|
break;
|
|
|
|
BuildDAG DAG(*R, *this);
|
|
const auto MinSchedule = makeMinRegSchedule(DAG.getTopRoots(), *this);
|
|
|
|
const auto RP = getSchedulePressure(*R, MinSchedule);
|
|
LLVM_DEBUG(if (R->MaxPressure.less(ST, RP, TgtOcc)) {
|
|
dbgs() << "\nWarning: Pressure becomes worse after minreg!";
|
|
printSchedRP(dbgs(), R->MaxPressure, RP);
|
|
});
|
|
|
|
if (!force && MaxPressure.less(ST, RP, TgtOcc))
|
|
break;
|
|
|
|
scheduleRegion(*R, MinSchedule, RP);
|
|
LLVM_DEBUG(printSchedResult(dbgs(), R, RP));
|
|
|
|
MaxPressure = RP;
|
|
}
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// ILP scheduler port
|
|
|
|
void GCNIterativeScheduler::scheduleILP(
|
|
bool TryMaximizeOccupancy) {
|
|
const auto &ST = MF.getSubtarget<GCNSubtarget>();
|
|
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
|
|
auto TgtOcc = MFI->getMinAllowedOccupancy();
|
|
|
|
sortRegionsByPressure(TgtOcc);
|
|
auto Occ = Regions.front()->MaxPressure.getOccupancy(ST);
|
|
|
|
if (TryMaximizeOccupancy && Occ < TgtOcc)
|
|
Occ = tryMaximizeOccupancy(TgtOcc);
|
|
|
|
TgtOcc = std::min(Occ, TgtOcc);
|
|
LLVM_DEBUG(dbgs() << "Scheduling using default scheduler, "
|
|
"target occupancy = "
|
|
<< TgtOcc << '\n');
|
|
|
|
unsigned FinalOccupancy = std::min(Occ, MFI->getOccupancy());
|
|
for (auto R : Regions) {
|
|
BuildDAG DAG(*R, *this);
|
|
const auto ILPSchedule = makeGCNILPScheduler(DAG.getBottomRoots(), *this);
|
|
|
|
const auto RP = getSchedulePressure(*R, ILPSchedule);
|
|
LLVM_DEBUG(printSchedRP(dbgs(), R->MaxPressure, RP));
|
|
|
|
if (RP.getOccupancy(ST) < TgtOcc) {
|
|
LLVM_DEBUG(dbgs() << "Didn't fit into target occupancy O" << TgtOcc);
|
|
if (R->BestSchedule.get() &&
|
|
R->BestSchedule->MaxPressure.getOccupancy(ST) >= TgtOcc) {
|
|
LLVM_DEBUG(dbgs() << ", scheduling minimal register\n");
|
|
scheduleBest(*R);
|
|
}
|
|
} else {
|
|
scheduleRegion(*R, ILPSchedule, RP);
|
|
LLVM_DEBUG(printSchedResult(dbgs(), R, RP));
|
|
FinalOccupancy = std::min(FinalOccupancy, RP.getOccupancy(ST));
|
|
}
|
|
}
|
|
MFI->limitOccupancy(FinalOccupancy);
|
|
}
|