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7d62ff02e6
The lowering isn't really an optimization, so optnone shouldn't make a difference. ARM relies on the pass running when using "-mthread-model single", because in that mode, it doesn't run AtomicExpand. See bug for more details. Differential Revision: https://reviews.llvm.org/D37040 llvm-svn: 311565
40 lines
1.2 KiB
LLVM
40 lines
1.2 KiB
LLVM
; RUN: opt < %s -loweratomic -S | FileCheck %s
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define i8 @cmpswap() {
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; CHECK-LABEL: @cmpswap(
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%i = alloca i8
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%pair = cmpxchg i8* %i, i8 0, i8 42 monotonic monotonic
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%j = extractvalue { i8, i1 } %pair, 0
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; CHECK: [[OLDVAL:%[a-z0-9]+]] = load i8, i8* [[ADDR:%[a-z0-9]+]]
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; CHECK-NEXT: [[SAME:%[a-z0-9]+]] = icmp eq i8 [[OLDVAL]], 0
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; CHECK-NEXT: [[TO_STORE:%[a-z0-9]+]] = select i1 [[SAME]], i8 42, i8 [[OLDVAL]]
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; CHECK-NEXT: store i8 [[TO_STORE]], i8* [[ADDR]]
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = insertvalue { i8, i1 } undef, i8 [[OLDVAL]], 0
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; CHECK-NEXT: [[RES:%[a-z0-9]+]] = insertvalue { i8, i1 } [[TMP]], i1 [[SAME]], 1
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; CHECK-NEXT: [[VAL:%[a-z0-9]+]] = extractvalue { i8, i1 } [[RES]], 0
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ret i8 %j
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; CHECK: ret i8 [[VAL]]
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}
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define i8 @swap() {
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; CHECK-LABEL: @swap(
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%i = alloca i8
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%j = atomicrmw xchg i8* %i, i8 42 monotonic
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; CHECK: [[INST:%[a-z0-9]+]] = load
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; CHECK-NEXT: store
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ret i8 %j
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; CHECK: ret i8 [[INST]]
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}
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define i8 @swap_optnone() noinline optnone {
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; CHECK-LABEL: @swap_optnone(
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%i = alloca i8
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%j = atomicrmw xchg i8* %i, i8 42 monotonic
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; CHECK: [[INST:%[a-z0-9]+]] = load
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; CHECK-NEXT: store
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ret i8 %j
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; CHECK: ret i8 [[INST]]
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}
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