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llvm-mirror/test/MC
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Stanislav Mekhanoshin 6d0a401669 [AMDGPU] Add default 1 glc operand to rtn atomics 
This change adds a real glc operand to the return atomic
instead of just string " glc" in the middle of the asm
string.

Improves asm parser diagnostics.

Differential Revision: https://reviews.llvm.org/D90730
2020-11-05 10:41:59 -08:00
..
AArch64
Revert "[AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register."
2020-11-02 08:15:50 +00:00
AMDGPU
[AMDGPU] Add default 1 glc operand to rtn atomics
2020-11-05 10:41:59 -08:00
ARM
llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits
2020-10-04 15:48:57 -07:00
AsmParser
Introduce and use a new section type for the bb_addr_map section.
2020-10-08 11:13:19 -07:00
AVR
[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
2020-07-12 08:14:52 -07:00
BPF
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
COFF
[test][MC] Use %python in llvm/test/MC/COFF/bigobj.py
2020-10-07 14:03:28 -04:00
Disassembler
[AMDGPU] Add gfx1033 target
2020-11-03 16:27:48 +00:00
ELF
[MC] Make MCStreamer aware of AsmParser's StartTokLoc
2020-11-02 12:32:07 -08:00
Hexagon
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Lanai
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
MachO
llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits
2020-10-04 15:48:57 -07:00
Mips
[mips] Implement add.ps, mul.ps and sub.ps
2020-10-30 10:59:15 +03:00
MSP430
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
PowerPC
[PowerPC] Parse and ignore .machine ppc64
2020-11-02 16:49:57 -08:00
RISCV
[RISCV] Fix unused check prefixes in test/MC/RISCV/
2020-10-29 21:18:30 -07:00
Sparc
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn().
2020-10-06 14:42:40 +02:00
VE
[VE] Add missing BCR format
2020-10-29 23:30:49 +09:00
WebAssembly
[WebAssembly] Implement ref.null
2020-11-03 10:46:23 -08:00
X86
[X86] Support Intel avxvnni
2020-10-31 12:39:51 +08:00