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1396 lines
64 KiB
C++
1396 lines
64 KiB
C++
//===- TargetTransformInfo.h ------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This pass exposes codegen information to IR-level passes. Every
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/// transformation that uses codegen information is broken into three parts:
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/// 1. The IR-level analysis pass.
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/// 2. The IR-level transformation interface which provides the needed
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/// information.
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/// 3. Codegen-level implementation which uses target-specific hooks.
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///
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/// This file defines #2, which is the interface that IR-level transformations
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/// use for querying the codegen.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
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#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
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#include "llvm/ADT/Optional.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/DataTypes.h"
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#include <functional>
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namespace llvm {
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class Function;
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class GlobalValue;
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class Loop;
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class ScalarEvolution;
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class SCEV;
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class Type;
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class User;
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class Value;
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/// \brief Information about a load/store intrinsic defined by the target.
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struct MemIntrinsicInfo {
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/// This is the pointer that the intrinsic is loading from or storing to.
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/// If this is non-null, then analysis/optimization passes can assume that
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/// this intrinsic is functionally equivalent to a load/store from this
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/// pointer.
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Value *PtrVal = nullptr;
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// Ordering for atomic operations.
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AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
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// Same Id is set by the target for corresponding load/store intrinsics.
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unsigned short MatchingId = 0;
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bool ReadMem = false;
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bool WriteMem = false;
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bool IsVolatile = false;
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bool isUnordered() const {
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return (Ordering == AtomicOrdering::NotAtomic ||
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Ordering == AtomicOrdering::Unordered) && !IsVolatile;
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}
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};
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/// \brief This pass provides access to the codegen interfaces that are needed
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/// for IR-level transformations.
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class TargetTransformInfo {
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public:
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/// \brief Construct a TTI object using a type implementing the \c Concept
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/// API below.
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///
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/// This is used by targets to construct a TTI wrapping their target-specific
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/// implementaion that encodes appropriate costs for their target.
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template <typename T> TargetTransformInfo(T Impl);
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/// \brief Construct a baseline TTI object using a minimal implementation of
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/// the \c Concept API below.
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///
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/// The TTI implementation will reflect the information in the DataLayout
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/// provided if non-null.
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explicit TargetTransformInfo(const DataLayout &DL);
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// Provide move semantics.
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TargetTransformInfo(TargetTransformInfo &&Arg);
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TargetTransformInfo &operator=(TargetTransformInfo &&RHS);
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// We need to define the destructor out-of-line to define our sub-classes
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// out-of-line.
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~TargetTransformInfo();
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/// \brief Handle the invalidation of this information.
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///
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/// When used as a result of \c TargetIRAnalysis this method will be called
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/// when the function this was computed for changes. When it returns false,
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/// the information is preserved across those changes.
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bool invalidate(Function &, const PreservedAnalyses &,
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FunctionAnalysisManager::Invalidator &) {
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// FIXME: We should probably in some way ensure that the subtarget
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// information for a function hasn't changed.
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return false;
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}
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/// \name Generic Target Information
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/// @{
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/// \brief Underlying constants for 'cost' values in this interface.
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///
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/// Many APIs in this interface return a cost. This enum defines the
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/// fundamental values that should be used to interpret (and produce) those
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/// costs. The costs are returned as an int rather than a member of this
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/// enumeration because it is expected that the cost of one IR instruction
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/// may have a multiplicative factor to it or otherwise won't fit directly
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/// into the enum. Moreover, it is common to sum or average costs which works
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/// better as simple integral values. Thus this enum only provides constants.
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/// Also note that the returned costs are signed integers to make it natural
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/// to add, subtract, and test with zero (a common boundary condition). It is
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/// not expected that 2^32 is a realistic cost to be modeling at any point.
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///
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/// Note that these costs should usually reflect the intersection of code-size
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/// cost and execution cost. A free instruction is typically one that folds
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/// into another instruction. For example, reg-to-reg moves can often be
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/// skipped by renaming the registers in the CPU, but they still are encoded
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/// and thus wouldn't be considered 'free' here.
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enum TargetCostConstants {
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TCC_Free = 0, ///< Expected to fold away in lowering.
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TCC_Basic = 1, ///< The cost of a typical 'add' instruction.
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TCC_Expensive = 4 ///< The cost of a 'div' instruction on x86.
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};
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/// \brief Estimate the cost of a specific operation when lowered.
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///
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/// Note that this is designed to work on an arbitrary synthetic opcode, and
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/// thus work for hypothetical queries before an instruction has even been
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/// formed. However, this does *not* work for GEPs, and must not be called
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/// for a GEP instruction. Instead, use the dedicated getGEPCost interface as
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/// analyzing a GEP's cost required more information.
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///
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/// Typically only the result type is required, and the operand type can be
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/// omitted. However, if the opcode is one of the cast instructions, the
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/// operand type is required.
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///
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/// The returned cost is defined in terms of \c TargetCostConstants, see its
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/// comments for a detailed explanation of the cost values.
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int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy = nullptr) const;
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/// \brief Estimate the cost of a GEP operation when lowered.
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///
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/// The contract for this function is the same as \c getOperationCost except
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/// that it supports an interface that provides extra information specific to
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/// the GEP operation.
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int getGEPCost(Type *PointeeType, const Value *Ptr,
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ArrayRef<const Value *> Operands) const;
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/// \brief Estimate the cost of a function call when lowered.
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///
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/// The contract for this is the same as \c getOperationCost except that it
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/// supports an interface that provides extra information specific to call
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/// instructions.
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///
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/// This is the most basic query for estimating call cost: it only knows the
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/// function type and (potentially) the number of arguments at the call site.
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/// The latter is only interesting for varargs function types.
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int getCallCost(FunctionType *FTy, int NumArgs = -1) const;
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/// \brief Estimate the cost of calling a specific function when lowered.
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///
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/// This overload adds the ability to reason about the particular function
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/// being called in the event it is a library call with special lowering.
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int getCallCost(const Function *F, int NumArgs = -1) const;
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/// \brief Estimate the cost of calling a specific function when lowered.
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///
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/// This overload allows specifying a set of candidate argument values.
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int getCallCost(const Function *F, ArrayRef<const Value *> Arguments) const;
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/// \returns A value by which our inlining threshold should be multiplied.
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/// This is primarily used to bump up the inlining threshold wholesale on
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/// targets where calls are unusually expensive.
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///
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/// TODO: This is a rather blunt instrument. Perhaps altering the costs of
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/// individual classes of instructions would be better.
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unsigned getInliningThresholdMultiplier() const;
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/// \brief Estimate the cost of an intrinsic when lowered.
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///
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/// Mirrors the \c getCallCost method but uses an intrinsic identifier.
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int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
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ArrayRef<Type *> ParamTys) const;
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/// \brief Estimate the cost of an intrinsic when lowered.
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///
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/// Mirrors the \c getCallCost method but uses an intrinsic identifier.
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int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
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ArrayRef<const Value *> Arguments) const;
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/// \return The estimated number of case clusters when lowering \p 'SI'.
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/// \p JTSize Set a jump table size only when \p SI is suitable for a jump
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/// table.
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unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
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unsigned &JTSize) const;
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/// \brief Estimate the cost of a given IR user when lowered.
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///
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/// This can estimate the cost of either a ConstantExpr or Instruction when
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/// lowered. It has two primary advantages over the \c getOperationCost and
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/// \c getGEPCost above, and one significant disadvantage: it can only be
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/// used when the IR construct has already been formed.
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///
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/// The advantages are that it can inspect the SSA use graph to reason more
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/// accurately about the cost. For example, all-constant-GEPs can often be
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/// folded into a load or other instruction, but if they are used in some
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/// other context they may not be folded. This routine can distinguish such
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/// cases.
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///
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/// The returned cost is defined in terms of \c TargetCostConstants, see its
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/// comments for a detailed explanation of the cost values.
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int getUserCost(const User *U) const;
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/// \brief Return true if branch divergence exists.
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///
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/// Branch divergence has a significantly negative impact on GPU performance
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/// when threads in the same wavefront take different paths due to conditional
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/// branches.
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bool hasBranchDivergence() const;
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/// \brief Returns whether V is a source of divergence.
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///
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/// This function provides the target-dependent information for
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/// the target-independent DivergenceAnalysis. DivergenceAnalysis first
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/// builds the dependency graph, and then runs the reachability algorithm
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/// starting with the sources of divergence.
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bool isSourceOfDivergence(const Value *V) const;
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// \brief Returns true for the target specific
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// set of operations which produce uniform result
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// even taking non-unform arguments
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bool isAlwaysUniform(const Value *V) const;
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/// Returns the address space ID for a target's 'flat' address space. Note
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/// this is not necessarily the same as addrspace(0), which LLVM sometimes
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/// refers to as the generic address space. The flat address space is a
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/// generic address space that can be used access multiple segments of memory
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/// with different address spaces. Access of a memory location through a
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/// pointer with this address space is expected to be legal but slower
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/// compared to the same memory location accessed through a pointer with a
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/// different address space.
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//
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/// This is for for targets with different pointer representations which can
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/// be converted with the addrspacecast instruction. If a pointer is converted
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/// to this address space, optimizations should attempt to replace the access
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/// with the source address space.
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///
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/// \returns ~0u if the target does not have such a flat address space to
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/// optimize away.
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unsigned getFlatAddressSpace() const;
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/// \brief Test whether calls to a function lower to actual program function
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/// calls.
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///
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/// The idea is to test whether the program is likely to require a 'call'
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/// instruction or equivalent in order to call the given function.
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///
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/// FIXME: It's not clear that this is a good or useful query API. Client's
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/// should probably move to simpler cost metrics using the above.
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/// Alternatively, we could split the cost interface into distinct code-size
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/// and execution-speed costs. This would allow modelling the core of this
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/// query more accurately as a call is a single small instruction, but
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/// incurs significant execution cost.
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bool isLoweredToCall(const Function *F) const;
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struct LSRCost {
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/// TODO: Some of these could be merged. Also, a lexical ordering
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/// isn't always optimal.
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unsigned Insns;
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unsigned NumRegs;
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unsigned AddRecCost;
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unsigned NumIVMuls;
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unsigned NumBaseAdds;
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unsigned ImmCost;
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unsigned SetupCost;
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unsigned ScaleCost;
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};
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/// Parameters that control the generic loop unrolling transformation.
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struct UnrollingPreferences {
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/// The cost threshold for the unrolled loop. Should be relative to the
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/// getUserCost values returned by this API, and the expectation is that
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/// the unrolled loop's instructions when run through that interface should
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/// not exceed this cost. However, this is only an estimate. Also, specific
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/// loops may be unrolled even with a cost above this threshold if deemed
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/// profitable. Set this to UINT_MAX to disable the loop body cost
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/// restriction.
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unsigned Threshold;
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/// If complete unrolling will reduce the cost of the loop, we will boost
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/// the Threshold by a certain percent to allow more aggressive complete
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/// unrolling. This value provides the maximum boost percentage that we
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/// can apply to Threshold (The value should be no less than 100).
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/// BoostedThreshold = Threshold * min(RolledCost / UnrolledCost,
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/// MaxPercentThresholdBoost / 100)
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/// E.g. if complete unrolling reduces the loop execution time by 50%
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/// then we boost the threshold by the factor of 2x. If unrolling is not
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/// expected to reduce the running time, then we do not increase the
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/// threshold.
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unsigned MaxPercentThresholdBoost;
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/// The cost threshold for the unrolled loop when optimizing for size (set
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/// to UINT_MAX to disable).
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unsigned OptSizeThreshold;
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/// The cost threshold for the unrolled loop, like Threshold, but used
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/// for partial/runtime unrolling (set to UINT_MAX to disable).
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unsigned PartialThreshold;
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/// The cost threshold for the unrolled loop when optimizing for size, like
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/// OptSizeThreshold, but used for partial/runtime unrolling (set to
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/// UINT_MAX to disable).
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unsigned PartialOptSizeThreshold;
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/// A forced unrolling factor (the number of concatenated bodies of the
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/// original loop in the unrolled loop body). When set to 0, the unrolling
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/// transformation will select an unrolling factor based on the current cost
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/// threshold and other factors.
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unsigned Count;
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/// A forced peeling factor (the number of bodied of the original loop
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/// that should be peeled off before the loop body). When set to 0, the
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/// unrolling transformation will select a peeling factor based on profile
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/// information and other factors.
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unsigned PeelCount;
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/// Default unroll count for loops with run-time trip count.
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unsigned DefaultUnrollRuntimeCount;
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// Set the maximum unrolling factor. The unrolling factor may be selected
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// using the appropriate cost threshold, but may not exceed this number
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// (set to UINT_MAX to disable). This does not apply in cases where the
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// loop is being fully unrolled.
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unsigned MaxCount;
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/// Set the maximum unrolling factor for full unrolling. Like MaxCount, but
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/// applies even if full unrolling is selected. This allows a target to fall
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/// back to Partial unrolling if full unrolling is above FullUnrollMaxCount.
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unsigned FullUnrollMaxCount;
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// Represents number of instructions optimized when "back edge"
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// becomes "fall through" in unrolled loop.
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// For now we count a conditional branch on a backedge and a comparison
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// feeding it.
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unsigned BEInsns;
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/// Allow partial unrolling (unrolling of loops to expand the size of the
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/// loop body, not only to eliminate small constant-trip-count loops).
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bool Partial;
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/// Allow runtime unrolling (unrolling of loops to expand the size of the
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/// loop body even when the number of loop iterations is not known at
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/// compile time).
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bool Runtime;
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/// Allow generation of a loop remainder (extra iterations after unroll).
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bool AllowRemainder;
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/// Allow emitting expensive instructions (such as divisions) when computing
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/// the trip count of a loop for runtime unrolling.
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bool AllowExpensiveTripCount;
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/// Apply loop unroll on any kind of loop
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/// (mainly to loops that fail runtime unrolling).
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bool Force;
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/// Allow using trip count upper bound to unroll loops.
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bool UpperBound;
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/// Allow peeling off loop iterations for loops with low dynamic tripcount.
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bool AllowPeeling;
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};
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/// \brief Get target-customized preferences for the generic loop unrolling
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/// transformation. The caller will initialize UP with the current
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/// target-independent defaults.
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void getUnrollingPreferences(Loop *L, ScalarEvolution &,
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UnrollingPreferences &UP) const;
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/// @}
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/// \name Scalar Target Information
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/// @{
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/// \brief Flags indicating the kind of support for population count.
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///
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/// Compared to the SW implementation, HW support is supposed to
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/// significantly boost the performance when the population is dense, and it
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/// may or may not degrade performance if the population is sparse. A HW
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/// support is considered as "Fast" if it can outperform, or is on a par
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/// with, SW implementation when the population is sparse; otherwise, it is
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/// considered as "Slow".
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enum PopcntSupportKind { PSK_Software, PSK_SlowHardware, PSK_FastHardware };
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/// \brief Return true if the specified immediate is legal add immediate, that
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/// is the target has add instructions which can add a register with the
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/// immediate without having to materialize the immediate into a register.
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bool isLegalAddImmediate(int64_t Imm) const;
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/// \brief Return true if the specified immediate is legal icmp immediate,
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/// that is the target has icmp instructions which can compare a register
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/// against the immediate without having to materialize the immediate into a
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/// register.
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bool isLegalICmpImmediate(int64_t Imm) const;
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/// \brief Return true if the addressing mode represented by AM is legal for
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/// this target, for a load/store of the specified type.
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/// The type may be VoidTy, in which case only return true if the addressing
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/// mode is legal for a load/store of any legal type.
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/// TODO: Handle pre/postinc as well.
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace = 0) const;
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/// \brief Return true if LSR cost of C1 is lower than C1.
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bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
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TargetTransformInfo::LSRCost &C2) const;
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/// \brief Return true if the target supports masked load/store
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/// AVX2 and AVX-512 targets allow masks for consecutive load and store
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bool isLegalMaskedStore(Type *DataType) const;
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bool isLegalMaskedLoad(Type *DataType) const;
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/// \brief Return true if the target supports masked gather/scatter
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/// AVX-512 fully supports gather and scatter for vectors with 32 and 64
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/// bits scalar type.
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bool isLegalMaskedScatter(Type *DataType) const;
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bool isLegalMaskedGather(Type *DataType) const;
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/// Return true if target doesn't mind addresses in vectors.
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bool prefersVectorizedAddressing() const;
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/// \brief Return the cost of the scaling factor used in the addressing
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/// mode represented by AM for this target, for a load/store
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/// of the specified type.
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/// If the AM is supported, the return value must be >= 0.
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/// If the AM is not supported, it returns a negative value.
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/// TODO: Handle pre/postinc as well.
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace = 0) const;
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/// \brief Return true if target supports the load / store
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/// instruction with the given Offset on the form reg + Offset. It
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/// may be that Offset is too big for a certain type (register
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/// class).
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bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const;
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/// \brief Return true if it's free to truncate a value of type Ty1 to type
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/// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
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/// by referencing its sub-register AX.
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bool isTruncateFree(Type *Ty1, Type *Ty2) const;
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/// \brief Return true if it is profitable to hoist instruction in the
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/// then/else to before if.
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bool isProfitableToHoist(Instruction *I) const;
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/// \brief Return true if this type is legal.
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bool isTypeLegal(Type *Ty) const;
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/// \brief Returns the target's jmp_buf alignment in bytes.
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unsigned getJumpBufAlignment() const;
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/// \brief Returns the target's jmp_buf size in bytes.
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unsigned getJumpBufSize() const;
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/// \brief Return true if switches should be turned into lookup tables for the
|
|
/// target.
|
|
bool shouldBuildLookupTables() const;
|
|
|
|
/// \brief Return true if switches should be turned into lookup tables
|
|
/// containing this constant value for the target.
|
|
bool shouldBuildLookupTablesForConstant(Constant *C) const;
|
|
|
|
unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
|
|
|
|
unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
|
|
unsigned VF) const;
|
|
|
|
/// If target has efficient vector element load/store instructions, it can
|
|
/// return true here so that insertion/extraction costs are not added to
|
|
/// the scalarization cost of a load/store.
|
|
bool supportsEfficientVectorElementLoadStore() const;
|
|
|
|
/// \brief Don't restrict interleaved unrolling to small loops.
|
|
bool enableAggressiveInterleaving(bool LoopHasReductions) const;
|
|
|
|
/// \brief Enable inline expansion of memcmp
|
|
bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) const;
|
|
|
|
/// \brief Enable matching of interleaved access groups.
|
|
bool enableInterleavedAccessVectorization() const;
|
|
|
|
/// \brief Indicate that it is potentially unsafe to automatically vectorize
|
|
/// floating-point operations because the semantics of vector and scalar
|
|
/// floating-point semantics may differ. For example, ARM NEON v7 SIMD math
|
|
/// does not support IEEE-754 denormal numbers, while depending on the
|
|
/// platform, scalar floating-point math does.
|
|
/// This applies to floating-point math operations and calls, not memory
|
|
/// operations, shuffles, or casts.
|
|
bool isFPVectorizationPotentiallyUnsafe() const;
|
|
|
|
/// \brief Determine if the target supports unaligned memory accesses.
|
|
bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
|
|
unsigned BitWidth, unsigned AddressSpace = 0,
|
|
unsigned Alignment = 1,
|
|
bool *Fast = nullptr) const;
|
|
|
|
/// \brief Return hardware support for population count.
|
|
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
|
|
|
|
/// \brief Return true if the hardware has a fast square-root instruction.
|
|
bool haveFastSqrt(Type *Ty) const;
|
|
|
|
/// \brief Return the expected cost of supporting the floating point operation
|
|
/// of the specified type.
|
|
int getFPOpCost(Type *Ty) const;
|
|
|
|
/// \brief Return the expected cost of materializing for the given integer
|
|
/// immediate of the specified type.
|
|
int getIntImmCost(const APInt &Imm, Type *Ty) const;
|
|
|
|
/// \brief Return the expected cost of materialization for the given integer
|
|
/// immediate of the specified type for a given instruction. The cost can be
|
|
/// zero if the immediate can be folded into the specified instruction.
|
|
int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) const;
|
|
int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) const;
|
|
|
|
/// \brief Return the expected cost for the given integer when optimising
|
|
/// for size. This is different than the other integer immediate cost
|
|
/// functions in that it is subtarget agnostic. This is useful when you e.g.
|
|
/// target one ISA such as Aarch32 but smaller encodings could be possible
|
|
/// with another such as Thumb. This return value is used as a penalty when
|
|
/// the total costs for a constant is calculated (the bigger the cost, the
|
|
/// more beneficial constant hoisting is).
|
|
int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) const;
|
|
/// @}
|
|
|
|
/// \name Vector Target Information
|
|
/// @{
|
|
|
|
/// \brief The various kinds of shuffle patterns for vector queries.
|
|
enum ShuffleKind {
|
|
SK_Broadcast, ///< Broadcast element 0 to all other elements.
|
|
SK_Reverse, ///< Reverse the order of the vector.
|
|
SK_Alternate, ///< Choose alternate elements from vector.
|
|
SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset.
|
|
SK_ExtractSubvector,///< ExtractSubvector Index indicates start offset.
|
|
SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one
|
|
///< with any shuffle mask.
|
|
SK_PermuteSingleSrc ///< Shuffle elements of single source vector with any
|
|
///< shuffle mask.
|
|
};
|
|
|
|
/// \brief Additional information about an operand's possible values.
|
|
enum OperandValueKind {
|
|
OK_AnyValue, // Operand can have any value.
|
|
OK_UniformValue, // Operand is uniform (splat of a value).
|
|
OK_UniformConstantValue, // Operand is uniform constant.
|
|
OK_NonUniformConstantValue // Operand is a non uniform constant value.
|
|
};
|
|
|
|
/// \brief Additional properties of an operand's values.
|
|
enum OperandValueProperties { OP_None = 0, OP_PowerOf2 = 1 };
|
|
|
|
/// \return The number of scalar or vector registers that the target has.
|
|
/// If 'Vectors' is true, it returns the number of vector registers. If it is
|
|
/// set to false, it returns the number of scalar registers.
|
|
unsigned getNumberOfRegisters(bool Vector) const;
|
|
|
|
/// \return The width of the largest scalar or vector register type.
|
|
unsigned getRegisterBitWidth(bool Vector) const;
|
|
|
|
/// \return The width of the smallest vector register type.
|
|
unsigned getMinVectorRegisterBitWidth() const;
|
|
|
|
/// \return True if it should be considered for address type promotion.
|
|
/// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is
|
|
/// profitable without finding other extensions fed by the same input.
|
|
bool shouldConsiderAddressTypePromotion(
|
|
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const;
|
|
|
|
/// \return The size of a cache line in bytes.
|
|
unsigned getCacheLineSize() const;
|
|
|
|
/// \return How much before a load we should place the prefetch instruction.
|
|
/// This is currently measured in number of instructions.
|
|
unsigned getPrefetchDistance() const;
|
|
|
|
/// \return Some HW prefetchers can handle accesses up to a certain constant
|
|
/// stride. This is the minimum stride in bytes where it makes sense to start
|
|
/// adding SW prefetches. The default is 1, i.e. prefetch with any stride.
|
|
unsigned getMinPrefetchStride() const;
|
|
|
|
/// \return The maximum number of iterations to prefetch ahead. If the
|
|
/// required number of iterations is more than this number, no prefetching is
|
|
/// performed.
|
|
unsigned getMaxPrefetchIterationsAhead() const;
|
|
|
|
/// \return The maximum interleave factor that any transform should try to
|
|
/// perform for this target. This number depends on the level of parallelism
|
|
/// and the number of execution units in the CPU.
|
|
unsigned getMaxInterleaveFactor(unsigned VF) const;
|
|
|
|
/// \return The expected cost of arithmetic ops, such as mul, xor, fsub, etc.
|
|
/// \p Args is an optional argument which holds the instruction operands
|
|
/// values so the TTI can analyize those values searching for special
|
|
/// cases\optimizations based on those values.
|
|
int getArithmeticInstrCost(
|
|
unsigned Opcode, Type *Ty, OperandValueKind Opd1Info = OK_AnyValue,
|
|
OperandValueKind Opd2Info = OK_AnyValue,
|
|
OperandValueProperties Opd1PropInfo = OP_None,
|
|
OperandValueProperties Opd2PropInfo = OP_None,
|
|
ArrayRef<const Value *> Args = ArrayRef<const Value *>()) const;
|
|
|
|
/// \return The cost of a shuffle instruction of kind Kind and of type Tp.
|
|
/// The index and subtype parameters are used by the subvector insertion and
|
|
/// extraction shuffle kinds.
|
|
int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index = 0,
|
|
Type *SubTp = nullptr) const;
|
|
|
|
/// \return The expected cost of cast instructions, such as bitcast, trunc,
|
|
/// zext, etc. If there is an existing instruction that holds Opcode, it
|
|
/// may be passed in the 'I' parameter.
|
|
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
|
|
const Instruction *I = nullptr) const;
|
|
|
|
/// \return The expected cost of a sign- or zero-extended vector extract. Use
|
|
/// -1 to indicate that there is no information about the index value.
|
|
int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
|
|
unsigned Index = -1) const;
|
|
|
|
/// \return The expected cost of control-flow related instructions such as
|
|
/// Phi, Ret, Br.
|
|
int getCFInstrCost(unsigned Opcode) const;
|
|
|
|
/// \returns The expected cost of compare and select instructions. If there
|
|
/// is an existing instruction that holds Opcode, it may be passed in the
|
|
/// 'I' parameter.
|
|
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
|
|
Type *CondTy = nullptr, const Instruction *I = nullptr) const;
|
|
|
|
/// \return The expected cost of vector Insert and Extract.
|
|
/// Use -1 to indicate that there is no information on the index value.
|
|
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index = -1) const;
|
|
|
|
/// \return The cost of Load and Store instructions.
|
|
int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
|
unsigned AddressSpace, const Instruction *I = nullptr) const;
|
|
|
|
/// \return The cost of masked Load and Store instructions.
|
|
int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
|
unsigned AddressSpace) const;
|
|
|
|
/// \return The cost of Gather or Scatter operation
|
|
/// \p Opcode - is a type of memory access Load or Store
|
|
/// \p DataTy - a vector type of the data to be loaded or stored
|
|
/// \p Ptr - pointer [or vector of pointers] - address[es] in memory
|
|
/// \p VariableMask - true when the memory access is predicated with a mask
|
|
/// that is not a compile-time constant
|
|
/// \p Alignment - alignment of single element
|
|
int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
|
|
bool VariableMask, unsigned Alignment) const;
|
|
|
|
/// \return The cost of the interleaved memory operation.
|
|
/// \p Opcode is the memory operation code
|
|
/// \p VecTy is the vector type of the interleaved access.
|
|
/// \p Factor is the interleave factor
|
|
/// \p Indices is the indices for interleaved load members (as interleaved
|
|
/// load allows gaps)
|
|
/// \p Alignment is the alignment of the memory operation
|
|
/// \p AddressSpace is address space of the pointer.
|
|
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
|
|
ArrayRef<unsigned> Indices, unsigned Alignment,
|
|
unsigned AddressSpace) const;
|
|
|
|
/// \brief Calculate the cost of performing a vector reduction.
|
|
///
|
|
/// This is the cost of reducing the vector value of type \p Ty to a scalar
|
|
/// value using the operation denoted by \p Opcode. The form of the reduction
|
|
/// can either be a pairwise reduction or a reduction that splits the vector
|
|
/// at every reduction level.
|
|
///
|
|
/// Pairwise:
|
|
/// (v0, v1, v2, v3)
|
|
/// ((v0+v1), (v2, v3), undef, undef)
|
|
/// Split:
|
|
/// (v0, v1, v2, v3)
|
|
/// ((v0+v2), (v1+v3), undef, undef)
|
|
int getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm) const;
|
|
|
|
/// \returns The cost of Intrinsic instructions. Analyses the real arguments.
|
|
/// Three cases are handled: 1. scalar instruction 2. vector instruction
|
|
/// 3. scalar instruction which is to be vectorized with VF.
|
|
int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
|
|
ArrayRef<Value *> Args, FastMathFlags FMF,
|
|
unsigned VF = 1) const;
|
|
|
|
/// \returns The cost of Intrinsic instructions. Types analysis only.
|
|
/// If ScalarizationCostPassed is UINT_MAX, the cost of scalarizing the
|
|
/// arguments and the return value will be computed based on types.
|
|
int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
|
|
ArrayRef<Type *> Tys, FastMathFlags FMF,
|
|
unsigned ScalarizationCostPassed = UINT_MAX) const;
|
|
|
|
/// \returns The cost of Call instructions.
|
|
int getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type *> Tys) const;
|
|
|
|
/// \returns The number of pieces into which the provided type must be
|
|
/// split during legalization. Zero is returned when the answer is unknown.
|
|
unsigned getNumberOfParts(Type *Tp) const;
|
|
|
|
/// \returns The cost of the address computation. For most targets this can be
|
|
/// merged into the instruction indexing mode. Some targets might want to
|
|
/// distinguish between address computation for memory operations on vector
|
|
/// types and scalar types. Such targets should override this function.
|
|
/// The 'SE' parameter holds pointer for the scalar evolution object which
|
|
/// is used in order to get the Ptr step value in case of constant stride.
|
|
/// The 'Ptr' parameter holds SCEV of the access pointer.
|
|
int getAddressComputationCost(Type *Ty, ScalarEvolution *SE = nullptr,
|
|
const SCEV *Ptr = nullptr) const;
|
|
|
|
/// \returns The cost, if any, of keeping values of the given types alive
|
|
/// over a callsite.
|
|
///
|
|
/// Some types may require the use of register classes that do not have
|
|
/// any callee-saved registers, so would require a spill and fill.
|
|
unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const;
|
|
|
|
/// \returns True if the intrinsic is a supported memory intrinsic. Info
|
|
/// will contain additional information - whether the intrinsic may write
|
|
/// or read to memory, volatility and the pointer. Info is undefined
|
|
/// if false is returned.
|
|
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const;
|
|
|
|
/// \returns The maximum element size, in bytes, for an element
|
|
/// unordered-atomic memory intrinsic.
|
|
unsigned getAtomicMemIntrinsicMaxElementSize() const;
|
|
|
|
/// \returns A value which is the result of the given memory intrinsic. New
|
|
/// instructions may be created to extract the result from the given intrinsic
|
|
/// memory operation. Returns nullptr if the target cannot create a result
|
|
/// from the given intrinsic.
|
|
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
|
|
Type *ExpectedType) const;
|
|
|
|
/// \returns True if the two functions have compatible attributes for inlining
|
|
/// purposes.
|
|
bool areInlineCompatible(const Function *Caller,
|
|
const Function *Callee) const;
|
|
|
|
/// \returns The bitwidth of the largest vector type that should be used to
|
|
/// load/store in the given address space.
|
|
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
|
|
|
|
/// \returns True if the load instruction is legal to vectorize.
|
|
bool isLegalToVectorizeLoad(LoadInst *LI) const;
|
|
|
|
/// \returns True if the store instruction is legal to vectorize.
|
|
bool isLegalToVectorizeStore(StoreInst *SI) const;
|
|
|
|
/// \returns True if it is legal to vectorize the given load chain.
|
|
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const;
|
|
|
|
/// \returns True if it is legal to vectorize the given store chain.
|
|
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const;
|
|
|
|
/// \returns The new vector factor value if the target doesn't support \p
|
|
/// SizeInBytes loads or has a better vector factor.
|
|
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const;
|
|
|
|
/// \returns The new vector factor value if the target doesn't support \p
|
|
/// SizeInBytes stores or has a better vector factor.
|
|
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const;
|
|
|
|
/// Flags describing the kind of vector reduction.
|
|
struct ReductionFlags {
|
|
ReductionFlags() : IsMaxOp(false), IsSigned(false), NoNaN(false) {}
|
|
bool IsMaxOp; ///< If the op a min/max kind, true if it's a max operation.
|
|
bool IsSigned; ///< Whether the operation is a signed int reduction.
|
|
bool NoNaN; ///< If op is an fp min/max, whether NaNs may be present.
|
|
};
|
|
|
|
/// \returns True if the target wants to handle the given reduction idiom in
|
|
/// the intrinsics form instead of the shuffle form.
|
|
bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
|
|
ReductionFlags Flags) const;
|
|
|
|
/// \returns True if the target wants to expand the given reduction intrinsic
|
|
/// into a shuffle sequence.
|
|
bool shouldExpandReduction(const IntrinsicInst *II) const;
|
|
/// @}
|
|
|
|
private:
|
|
/// \brief The abstract base class used to type erase specific TTI
|
|
/// implementations.
|
|
class Concept;
|
|
|
|
/// \brief The template model for the base class which wraps a concrete
|
|
/// implementation in a type erased interface.
|
|
template <typename T> class Model;
|
|
|
|
std::unique_ptr<Concept> TTIImpl;
|
|
};
|
|
|
|
class TargetTransformInfo::Concept {
|
|
public:
|
|
virtual ~Concept() = 0;
|
|
virtual const DataLayout &getDataLayout() const = 0;
|
|
virtual int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) = 0;
|
|
virtual int getGEPCost(Type *PointeeType, const Value *Ptr,
|
|
ArrayRef<const Value *> Operands) = 0;
|
|
virtual int getCallCost(FunctionType *FTy, int NumArgs) = 0;
|
|
virtual int getCallCost(const Function *F, int NumArgs) = 0;
|
|
virtual int getCallCost(const Function *F,
|
|
ArrayRef<const Value *> Arguments) = 0;
|
|
virtual unsigned getInliningThresholdMultiplier() = 0;
|
|
virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
|
|
ArrayRef<Type *> ParamTys) = 0;
|
|
virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
|
|
ArrayRef<const Value *> Arguments) = 0;
|
|
virtual unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
|
|
unsigned &JTSize) = 0;
|
|
virtual int getUserCost(const User *U) = 0;
|
|
virtual bool hasBranchDivergence() = 0;
|
|
virtual bool isSourceOfDivergence(const Value *V) = 0;
|
|
virtual bool isAlwaysUniform(const Value *V) = 0;
|
|
virtual unsigned getFlatAddressSpace() = 0;
|
|
virtual bool isLoweredToCall(const Function *F) = 0;
|
|
virtual void getUnrollingPreferences(Loop *L, ScalarEvolution &,
|
|
UnrollingPreferences &UP) = 0;
|
|
virtual bool isLegalAddImmediate(int64_t Imm) = 0;
|
|
virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
|
|
virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
|
|
int64_t BaseOffset, bool HasBaseReg,
|
|
int64_t Scale,
|
|
unsigned AddrSpace) = 0;
|
|
virtual bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
|
|
TargetTransformInfo::LSRCost &C2) = 0;
|
|
virtual bool isLegalMaskedStore(Type *DataType) = 0;
|
|
virtual bool isLegalMaskedLoad(Type *DataType) = 0;
|
|
virtual bool isLegalMaskedScatter(Type *DataType) = 0;
|
|
virtual bool isLegalMaskedGather(Type *DataType) = 0;
|
|
virtual bool prefersVectorizedAddressing() = 0;
|
|
virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
|
|
int64_t BaseOffset, bool HasBaseReg,
|
|
int64_t Scale, unsigned AddrSpace) = 0;
|
|
virtual bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) = 0;
|
|
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
|
|
virtual bool isProfitableToHoist(Instruction *I) = 0;
|
|
virtual bool isTypeLegal(Type *Ty) = 0;
|
|
virtual unsigned getJumpBufAlignment() = 0;
|
|
virtual unsigned getJumpBufSize() = 0;
|
|
virtual bool shouldBuildLookupTables() = 0;
|
|
virtual bool shouldBuildLookupTablesForConstant(Constant *C) = 0;
|
|
virtual unsigned
|
|
getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) = 0;
|
|
virtual unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
|
|
unsigned VF) = 0;
|
|
virtual bool supportsEfficientVectorElementLoadStore() = 0;
|
|
virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0;
|
|
virtual bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) = 0;
|
|
virtual bool enableInterleavedAccessVectorization() = 0;
|
|
virtual bool isFPVectorizationPotentiallyUnsafe() = 0;
|
|
virtual bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
|
|
unsigned BitWidth,
|
|
unsigned AddressSpace,
|
|
unsigned Alignment,
|
|
bool *Fast) = 0;
|
|
virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) = 0;
|
|
virtual bool haveFastSqrt(Type *Ty) = 0;
|
|
virtual int getFPOpCost(Type *Ty) = 0;
|
|
virtual int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) = 0;
|
|
virtual int getIntImmCost(const APInt &Imm, Type *Ty) = 0;
|
|
virtual int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) = 0;
|
|
virtual int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) = 0;
|
|
virtual unsigned getNumberOfRegisters(bool Vector) = 0;
|
|
virtual unsigned getRegisterBitWidth(bool Vector) const = 0;
|
|
virtual unsigned getMinVectorRegisterBitWidth() = 0;
|
|
virtual bool shouldConsiderAddressTypePromotion(
|
|
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0;
|
|
virtual unsigned getCacheLineSize() = 0;
|
|
virtual unsigned getPrefetchDistance() = 0;
|
|
virtual unsigned getMinPrefetchStride() = 0;
|
|
virtual unsigned getMaxPrefetchIterationsAhead() = 0;
|
|
virtual unsigned getMaxInterleaveFactor(unsigned VF) = 0;
|
|
virtual unsigned
|
|
getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
|
|
OperandValueKind Opd2Info,
|
|
OperandValueProperties Opd1PropInfo,
|
|
OperandValueProperties Opd2PropInfo,
|
|
ArrayRef<const Value *> Args) = 0;
|
|
virtual int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
|
|
Type *SubTp) = 0;
|
|
virtual int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
|
|
const Instruction *I) = 0;
|
|
virtual int getExtractWithExtendCost(unsigned Opcode, Type *Dst,
|
|
VectorType *VecTy, unsigned Index) = 0;
|
|
virtual int getCFInstrCost(unsigned Opcode) = 0;
|
|
virtual int getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
|
|
Type *CondTy, const Instruction *I) = 0;
|
|
virtual int getVectorInstrCost(unsigned Opcode, Type *Val,
|
|
unsigned Index) = 0;
|
|
virtual int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
|
unsigned AddressSpace, const Instruction *I) = 0;
|
|
virtual int getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
|
|
unsigned Alignment,
|
|
unsigned AddressSpace) = 0;
|
|
virtual int getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
|
|
Value *Ptr, bool VariableMask,
|
|
unsigned Alignment) = 0;
|
|
virtual int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
|
|
unsigned Factor,
|
|
ArrayRef<unsigned> Indices,
|
|
unsigned Alignment,
|
|
unsigned AddressSpace) = 0;
|
|
virtual int getReductionCost(unsigned Opcode, Type *Ty,
|
|
bool IsPairwiseForm) = 0;
|
|
virtual int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
|
|
ArrayRef<Type *> Tys, FastMathFlags FMF,
|
|
unsigned ScalarizationCostPassed) = 0;
|
|
virtual int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
|
|
ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) = 0;
|
|
virtual int getCallInstrCost(Function *F, Type *RetTy,
|
|
ArrayRef<Type *> Tys) = 0;
|
|
virtual unsigned getNumberOfParts(Type *Tp) = 0;
|
|
virtual int getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
|
|
const SCEV *Ptr) = 0;
|
|
virtual unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) = 0;
|
|
virtual bool getTgtMemIntrinsic(IntrinsicInst *Inst,
|
|
MemIntrinsicInfo &Info) = 0;
|
|
virtual unsigned getAtomicMemIntrinsicMaxElementSize() const = 0;
|
|
virtual Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
|
|
Type *ExpectedType) = 0;
|
|
virtual bool areInlineCompatible(const Function *Caller,
|
|
const Function *Callee) const = 0;
|
|
virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const = 0;
|
|
virtual bool isLegalToVectorizeLoad(LoadInst *LI) const = 0;
|
|
virtual bool isLegalToVectorizeStore(StoreInst *SI) const = 0;
|
|
virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const = 0;
|
|
virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const = 0;
|
|
virtual unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const = 0;
|
|
virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const = 0;
|
|
virtual bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
|
|
ReductionFlags) const = 0;
|
|
virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0;
|
|
};
|
|
|
|
template <typename T>
|
|
class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
|
|
T Impl;
|
|
|
|
public:
|
|
Model(T Impl) : Impl(std::move(Impl)) {}
|
|
~Model() override {}
|
|
|
|
const DataLayout &getDataLayout() const override {
|
|
return Impl.getDataLayout();
|
|
}
|
|
|
|
int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) override {
|
|
return Impl.getOperationCost(Opcode, Ty, OpTy);
|
|
}
|
|
int getGEPCost(Type *PointeeType, const Value *Ptr,
|
|
ArrayRef<const Value *> Operands) override {
|
|
return Impl.getGEPCost(PointeeType, Ptr, Operands);
|
|
}
|
|
int getCallCost(FunctionType *FTy, int NumArgs) override {
|
|
return Impl.getCallCost(FTy, NumArgs);
|
|
}
|
|
int getCallCost(const Function *F, int NumArgs) override {
|
|
return Impl.getCallCost(F, NumArgs);
|
|
}
|
|
int getCallCost(const Function *F,
|
|
ArrayRef<const Value *> Arguments) override {
|
|
return Impl.getCallCost(F, Arguments);
|
|
}
|
|
unsigned getInliningThresholdMultiplier() override {
|
|
return Impl.getInliningThresholdMultiplier();
|
|
}
|
|
int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
|
|
ArrayRef<Type *> ParamTys) override {
|
|
return Impl.getIntrinsicCost(IID, RetTy, ParamTys);
|
|
}
|
|
int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
|
|
ArrayRef<const Value *> Arguments) override {
|
|
return Impl.getIntrinsicCost(IID, RetTy, Arguments);
|
|
}
|
|
int getUserCost(const User *U) override { return Impl.getUserCost(U); }
|
|
bool hasBranchDivergence() override { return Impl.hasBranchDivergence(); }
|
|
bool isSourceOfDivergence(const Value *V) override {
|
|
return Impl.isSourceOfDivergence(V);
|
|
}
|
|
|
|
bool isAlwaysUniform(const Value *V) override {
|
|
return Impl.isAlwaysUniform(V);
|
|
}
|
|
|
|
unsigned getFlatAddressSpace() override {
|
|
return Impl.getFlatAddressSpace();
|
|
}
|
|
|
|
bool isLoweredToCall(const Function *F) override {
|
|
return Impl.isLoweredToCall(F);
|
|
}
|
|
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
|
|
UnrollingPreferences &UP) override {
|
|
return Impl.getUnrollingPreferences(L, SE, UP);
|
|
}
|
|
bool isLegalAddImmediate(int64_t Imm) override {
|
|
return Impl.isLegalAddImmediate(Imm);
|
|
}
|
|
bool isLegalICmpImmediate(int64_t Imm) override {
|
|
return Impl.isLegalICmpImmediate(Imm);
|
|
}
|
|
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
|
|
bool HasBaseReg, int64_t Scale,
|
|
unsigned AddrSpace) override {
|
|
return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
|
|
Scale, AddrSpace);
|
|
}
|
|
bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
|
|
TargetTransformInfo::LSRCost &C2) override {
|
|
return Impl.isLSRCostLess(C1, C2);
|
|
}
|
|
bool isLegalMaskedStore(Type *DataType) override {
|
|
return Impl.isLegalMaskedStore(DataType);
|
|
}
|
|
bool isLegalMaskedLoad(Type *DataType) override {
|
|
return Impl.isLegalMaskedLoad(DataType);
|
|
}
|
|
bool isLegalMaskedScatter(Type *DataType) override {
|
|
return Impl.isLegalMaskedScatter(DataType);
|
|
}
|
|
bool isLegalMaskedGather(Type *DataType) override {
|
|
return Impl.isLegalMaskedGather(DataType);
|
|
}
|
|
bool prefersVectorizedAddressing() override {
|
|
return Impl.prefersVectorizedAddressing();
|
|
}
|
|
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
|
|
bool HasBaseReg, int64_t Scale,
|
|
unsigned AddrSpace) override {
|
|
return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
|
|
Scale, AddrSpace);
|
|
}
|
|
bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) override {
|
|
return Impl.isFoldableMemAccessOffset(I, Offset);
|
|
}
|
|
bool isTruncateFree(Type *Ty1, Type *Ty2) override {
|
|
return Impl.isTruncateFree(Ty1, Ty2);
|
|
}
|
|
bool isProfitableToHoist(Instruction *I) override {
|
|
return Impl.isProfitableToHoist(I);
|
|
}
|
|
bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); }
|
|
unsigned getJumpBufAlignment() override { return Impl.getJumpBufAlignment(); }
|
|
unsigned getJumpBufSize() override { return Impl.getJumpBufSize(); }
|
|
bool shouldBuildLookupTables() override {
|
|
return Impl.shouldBuildLookupTables();
|
|
}
|
|
bool shouldBuildLookupTablesForConstant(Constant *C) override {
|
|
return Impl.shouldBuildLookupTablesForConstant(C);
|
|
}
|
|
unsigned getScalarizationOverhead(Type *Ty, bool Insert,
|
|
bool Extract) override {
|
|
return Impl.getScalarizationOverhead(Ty, Insert, Extract);
|
|
}
|
|
unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
|
|
unsigned VF) override {
|
|
return Impl.getOperandsScalarizationOverhead(Args, VF);
|
|
}
|
|
|
|
bool supportsEfficientVectorElementLoadStore() override {
|
|
return Impl.supportsEfficientVectorElementLoadStore();
|
|
}
|
|
|
|
bool enableAggressiveInterleaving(bool LoopHasReductions) override {
|
|
return Impl.enableAggressiveInterleaving(LoopHasReductions);
|
|
}
|
|
bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) override {
|
|
return Impl.expandMemCmp(I, MaxLoadSize);
|
|
}
|
|
bool enableInterleavedAccessVectorization() override {
|
|
return Impl.enableInterleavedAccessVectorization();
|
|
}
|
|
bool isFPVectorizationPotentiallyUnsafe() override {
|
|
return Impl.isFPVectorizationPotentiallyUnsafe();
|
|
}
|
|
bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
|
|
unsigned BitWidth, unsigned AddressSpace,
|
|
unsigned Alignment, bool *Fast) override {
|
|
return Impl.allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
|
|
Alignment, Fast);
|
|
}
|
|
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) override {
|
|
return Impl.getPopcntSupport(IntTyWidthInBit);
|
|
}
|
|
bool haveFastSqrt(Type *Ty) override { return Impl.haveFastSqrt(Ty); }
|
|
|
|
int getFPOpCost(Type *Ty) override { return Impl.getFPOpCost(Ty); }
|
|
|
|
int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) override {
|
|
return Impl.getIntImmCodeSizeCost(Opc, Idx, Imm, Ty);
|
|
}
|
|
int getIntImmCost(const APInt &Imm, Type *Ty) override {
|
|
return Impl.getIntImmCost(Imm, Ty);
|
|
}
|
|
int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) override {
|
|
return Impl.getIntImmCost(Opc, Idx, Imm, Ty);
|
|
}
|
|
int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
|
|
Type *Ty) override {
|
|
return Impl.getIntImmCost(IID, Idx, Imm, Ty);
|
|
}
|
|
unsigned getNumberOfRegisters(bool Vector) override {
|
|
return Impl.getNumberOfRegisters(Vector);
|
|
}
|
|
unsigned getRegisterBitWidth(bool Vector) const override {
|
|
return Impl.getRegisterBitWidth(Vector);
|
|
}
|
|
unsigned getMinVectorRegisterBitWidth() override {
|
|
return Impl.getMinVectorRegisterBitWidth();
|
|
}
|
|
bool shouldConsiderAddressTypePromotion(
|
|
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override {
|
|
return Impl.shouldConsiderAddressTypePromotion(
|
|
I, AllowPromotionWithoutCommonHeader);
|
|
}
|
|
unsigned getCacheLineSize() override {
|
|
return Impl.getCacheLineSize();
|
|
}
|
|
unsigned getPrefetchDistance() override { return Impl.getPrefetchDistance(); }
|
|
unsigned getMinPrefetchStride() override {
|
|
return Impl.getMinPrefetchStride();
|
|
}
|
|
unsigned getMaxPrefetchIterationsAhead() override {
|
|
return Impl.getMaxPrefetchIterationsAhead();
|
|
}
|
|
unsigned getMaxInterleaveFactor(unsigned VF) override {
|
|
return Impl.getMaxInterleaveFactor(VF);
|
|
}
|
|
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
|
|
unsigned &JTSize) override {
|
|
return Impl.getEstimatedNumberOfCaseClusters(SI, JTSize);
|
|
}
|
|
unsigned
|
|
getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
|
|
OperandValueKind Opd2Info,
|
|
OperandValueProperties Opd1PropInfo,
|
|
OperandValueProperties Opd2PropInfo,
|
|
ArrayRef<const Value *> Args) override {
|
|
return Impl.getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
|
|
Opd1PropInfo, Opd2PropInfo, Args);
|
|
}
|
|
int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
|
|
Type *SubTp) override {
|
|
return Impl.getShuffleCost(Kind, Tp, Index, SubTp);
|
|
}
|
|
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
|
|
const Instruction *I) override {
|
|
return Impl.getCastInstrCost(Opcode, Dst, Src, I);
|
|
}
|
|
int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
|
|
unsigned Index) override {
|
|
return Impl.getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
|
|
}
|
|
int getCFInstrCost(unsigned Opcode) override {
|
|
return Impl.getCFInstrCost(Opcode);
|
|
}
|
|
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
|
|
const Instruction *I) override {
|
|
return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
|
|
}
|
|
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) override {
|
|
return Impl.getVectorInstrCost(Opcode, Val, Index);
|
|
}
|
|
int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
|
unsigned AddressSpace, const Instruction *I) override {
|
|
return Impl.getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
|
|
}
|
|
int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
|
unsigned AddressSpace) override {
|
|
return Impl.getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
|
|
}
|
|
int getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
|
|
Value *Ptr, bool VariableMask,
|
|
unsigned Alignment) override {
|
|
return Impl.getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
|
|
Alignment);
|
|
}
|
|
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
|
|
ArrayRef<unsigned> Indices, unsigned Alignment,
|
|
unsigned AddressSpace) override {
|
|
return Impl.getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
|
|
Alignment, AddressSpace);
|
|
}
|
|
int getReductionCost(unsigned Opcode, Type *Ty,
|
|
bool IsPairwiseForm) override {
|
|
return Impl.getReductionCost(Opcode, Ty, IsPairwiseForm);
|
|
}
|
|
int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy, ArrayRef<Type *> Tys,
|
|
FastMathFlags FMF, unsigned ScalarizationCostPassed) override {
|
|
return Impl.getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
|
|
ScalarizationCostPassed);
|
|
}
|
|
int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
|
|
ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) override {
|
|
return Impl.getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
|
|
}
|
|
int getCallInstrCost(Function *F, Type *RetTy,
|
|
ArrayRef<Type *> Tys) override {
|
|
return Impl.getCallInstrCost(F, RetTy, Tys);
|
|
}
|
|
unsigned getNumberOfParts(Type *Tp) override {
|
|
return Impl.getNumberOfParts(Tp);
|
|
}
|
|
int getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
|
|
const SCEV *Ptr) override {
|
|
return Impl.getAddressComputationCost(Ty, SE, Ptr);
|
|
}
|
|
unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) override {
|
|
return Impl.getCostOfKeepingLiveOverCall(Tys);
|
|
}
|
|
bool getTgtMemIntrinsic(IntrinsicInst *Inst,
|
|
MemIntrinsicInfo &Info) override {
|
|
return Impl.getTgtMemIntrinsic(Inst, Info);
|
|
}
|
|
unsigned getAtomicMemIntrinsicMaxElementSize() const override {
|
|
return Impl.getAtomicMemIntrinsicMaxElementSize();
|
|
}
|
|
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
|
|
Type *ExpectedType) override {
|
|
return Impl.getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
|
|
}
|
|
bool areInlineCompatible(const Function *Caller,
|
|
const Function *Callee) const override {
|
|
return Impl.areInlineCompatible(Caller, Callee);
|
|
}
|
|
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const override {
|
|
return Impl.getLoadStoreVecRegBitWidth(AddrSpace);
|
|
}
|
|
bool isLegalToVectorizeLoad(LoadInst *LI) const override {
|
|
return Impl.isLegalToVectorizeLoad(LI);
|
|
}
|
|
bool isLegalToVectorizeStore(StoreInst *SI) const override {
|
|
return Impl.isLegalToVectorizeStore(SI);
|
|
}
|
|
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const override {
|
|
return Impl.isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
|
|
AddrSpace);
|
|
}
|
|
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
|
|
unsigned Alignment,
|
|
unsigned AddrSpace) const override {
|
|
return Impl.isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
|
|
AddrSpace);
|
|
}
|
|
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const override {
|
|
return Impl.getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
|
|
}
|
|
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const override {
|
|
return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
|
|
}
|
|
bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
|
|
ReductionFlags Flags) const override {
|
|
return Impl.useReductionIntrinsic(Opcode, Ty, Flags);
|
|
}
|
|
bool shouldExpandReduction(const IntrinsicInst *II) const override {
|
|
return Impl.shouldExpandReduction(II);
|
|
}
|
|
};
|
|
|
|
template <typename T>
|
|
TargetTransformInfo::TargetTransformInfo(T Impl)
|
|
: TTIImpl(new Model<T>(Impl)) {}
|
|
|
|
/// \brief Analysis pass providing the \c TargetTransformInfo.
|
|
///
|
|
/// The core idea of the TargetIRAnalysis is to expose an interface through
|
|
/// which LLVM targets can analyze and provide information about the middle
|
|
/// end's target-independent IR. This supports use cases such as target-aware
|
|
/// cost modeling of IR constructs.
|
|
///
|
|
/// This is a function analysis because much of the cost modeling for targets
|
|
/// is done in a subtarget specific way and LLVM supports compiling different
|
|
/// functions targeting different subtargets in order to support runtime
|
|
/// dispatch according to the observed subtarget.
|
|
class TargetIRAnalysis : public AnalysisInfoMixin<TargetIRAnalysis> {
|
|
public:
|
|
typedef TargetTransformInfo Result;
|
|
|
|
/// \brief Default construct a target IR analysis.
|
|
///
|
|
/// This will use the module's datalayout to construct a baseline
|
|
/// conservative TTI result.
|
|
TargetIRAnalysis();
|
|
|
|
/// \brief Construct an IR analysis pass around a target-provide callback.
|
|
///
|
|
/// The callback will be called with a particular function for which the TTI
|
|
/// is needed and must return a TTI object for that function.
|
|
TargetIRAnalysis(std::function<Result(const Function &)> TTICallback);
|
|
|
|
// Value semantics. We spell out the constructors for MSVC.
|
|
TargetIRAnalysis(const TargetIRAnalysis &Arg)
|
|
: TTICallback(Arg.TTICallback) {}
|
|
TargetIRAnalysis(TargetIRAnalysis &&Arg)
|
|
: TTICallback(std::move(Arg.TTICallback)) {}
|
|
TargetIRAnalysis &operator=(const TargetIRAnalysis &RHS) {
|
|
TTICallback = RHS.TTICallback;
|
|
return *this;
|
|
}
|
|
TargetIRAnalysis &operator=(TargetIRAnalysis &&RHS) {
|
|
TTICallback = std::move(RHS.TTICallback);
|
|
return *this;
|
|
}
|
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Result run(const Function &F, FunctionAnalysisManager &);
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private:
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friend AnalysisInfoMixin<TargetIRAnalysis>;
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static AnalysisKey Key;
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/// \brief The callback used to produce a result.
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///
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/// We use a completely opaque callback so that targets can provide whatever
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/// mechanism they desire for constructing the TTI for a given function.
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|
///
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/// FIXME: Should we really use std::function? It's relatively inefficient.
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/// It might be possible to arrange for even stateful callbacks to outlive
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|
/// the analysis and thus use a function_ref which would be lighter weight.
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|
/// This may also be less error prone as the callback is likely to reference
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|
/// the external TargetMachine, and that reference needs to never dangle.
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|
std::function<Result(const Function &)> TTICallback;
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|
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|
/// \brief Helper function used as the callback in the default constructor.
|
|
static Result getDefaultTTI(const Function &F);
|
|
};
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|
|
|
/// \brief Wrapper pass for TargetTransformInfo.
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|
///
|
|
/// This pass can be constructed from a TTI object which it stores internally
|
|
/// and is queried by passes.
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|
class TargetTransformInfoWrapperPass : public ImmutablePass {
|
|
TargetIRAnalysis TIRA;
|
|
Optional<TargetTransformInfo> TTI;
|
|
|
|
virtual void anchor();
|
|
|
|
public:
|
|
static char ID;
|
|
|
|
/// \brief We must provide a default constructor for the pass but it should
|
|
/// never be used.
|
|
///
|
|
/// Use the constructor below or call one of the creation routines.
|
|
TargetTransformInfoWrapperPass();
|
|
|
|
explicit TargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
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|
|
|
TargetTransformInfo &getTTI(const Function &F);
|
|
};
|
|
|
|
/// \brief Create an analysis pass wrapper around a TTI object.
|
|
///
|
|
/// This analysis pass just holds the TTI instance and makes it available to
|
|
/// clients.
|
|
ImmutablePass *createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
|
|
|
|
} // End llvm namespace
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|
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#endif
|