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4f410cc25c
Improved InstCombine support for CVTPH2PS (F16C half 2 float conversion): <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) - only uses the bottom 4 i16 elements for the conversion. Added constant folding support. Differential Revision: http://reviews.llvm.org/D12731 llvm-svn: 247504
62 lines
2.5 KiB
LLVM
62 lines
2.5 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>)
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declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>)
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;
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; Vector Demanded Bits
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;
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; Only bottom 4 elements required.
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define <4 x float> @demand_vcvtph2ps_128(<8 x i16> %A) {
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; CHECK-LABEL: @demand_vcvtph2ps_128
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; CHECK-NEXT: %1 = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %A)
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; CHECK-NEXT: ret <4 x float> %1
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%1 = shufflevector <8 x i16> %A, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%2 = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %1)
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ret <4 x float> %2
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}
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; All 8 elements required.
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define <8 x float> @demand_vcvtph2ps_256(<8 x i16> %A) {
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; CHECK-LABEL: @demand_vcvtph2ps_256
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; CHECK-NEXT: %1 = shufflevector <8 x i16> %A, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: %2 = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %1)
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; CHECK-NEXT: ret <8 x float> %2
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%1 = shufflevector <8 x i16> %A, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%2 = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %1)
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ret <8 x float> %2
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}
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;
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; Constant Folding
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;
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define <4 x float> @fold_vcvtph2ps_128() {
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; CHECK-LABEL: @fold_vcvtph2ps_128
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; CHECK-NEXT: ret <4 x float> <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float -0.000000e+00>
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%1 = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> <i16 0, i16 14336, i16 15360, i16 32768, i16 16384, i16 31743, i16 48128, i16 49152>)
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ret <4 x float> %1
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}
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define <8 x float> @fold_vcvtph2ps_256() {
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; CHECK-LABEL: @fold_vcvtph2ps_256
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; CHECK-NEXT: ret <8 x float> <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float -0.000000e+00, float 2.000000e+00, float 6.550400e+04, float -1.000000e+00, float -2.000000e+00>
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%1 = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> <i16 0, i16 14336, i16 15360, i16 32768, i16 16384, i16 31743, i16 48128, i16 49152>)
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ret <8 x float> %1
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}
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define <4 x float> @fold_vcvtph2ps_128_zero() {
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; CHECK-LABEL: @fold_vcvtph2ps_128_zero
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; CHECK-NEXT: ret <4 x float> zeroinitializer
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%1 = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
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ret <4 x float> %1
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}
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define <8 x float> @fold_vcvtph2ps_256_zero() {
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; CHECK-LABEL: @fold_vcvtph2ps_256_zero
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; CHECK-NEXT: ret <8 x float> zeroinitializer
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%1 = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
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ret <8 x float> %1
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}
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