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1b0721730e
Summary: InstCombine unfolds expressions of the form `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` such that in a later iteration of InstCombine the exposed `zext(icmp)` instructions can be optimized. We now combine this unfolding and the subsequent `zext(icmp)` optimization to be performed together. Since the unfolding doesn't happen separately anymore, we also again enable the folding of `logic(cast(icmp), cast(icmp))` expressions to `cast(logic(icmp, icmp))` which had been disabled due to its interference with the unfolding transformation. Tested via `make check` and `lnt`. Background ========== For a better understanding on how it came to this change we subsequently summarize its history. In commit r275989 we've already tried to enable the folding of `logic(cast(icmp), cast(icmp))` to `cast(logic(icmp, icmp))` which had to be reverted in r276106 because it could lead to an endless loop in InstCombine (also see http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160718/374347.html). The root of this problem is that in `visitZExt()` in InstCombineCasts.cpp there also exists a reverse of the above folding transformation, that unfolds `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` in order to expose `zext(icmp)` operations which would then possibly be eliminated by subsequent iterations of InstCombine. However, before these `zext(icmp)` would be eliminated the folding from r275989 could kick in and cause InstCombine to endlessly switch back and forth between the folding and the unfolding transformation. This is the reason why we now combine the `zext`-unfolding and the elimination of the exposed `zext(icmp)` to happen at one go because this enables us to still allow the cast-folding in `logic(cast(icmp), cast(icmp))` without entering an endless loop again. Details on the submitted changes ================================ - In `visitZExt()` we combine the unfolding and optimization of `zext` instructions. - In `transformZExtICmp()` we have to use `Builder->CreateIntCast()` instead of `CastInst::CreateIntegerCast()` to make sure that the new `CastInst` is inserted in a `BasicBlock`. The new calls to `transformZExtICmp()` that we introduce in `visitZExt()` would otherwise cause according assertions to be triggered (in our case this happend, for example, with lnt for the MultiSource/Applications/sqlite3 and SingleSource/Regression/C++/EH/recursive-throw tests). The subsequent usage of `replaceInstUsesWith()` is necessary to ensure that the new `CastInst` replaces the `ZExtInst` accordingly. - In InstCombineAndOrXor.cpp we again allow the folding of casts on `icmp` instructions. - The instruction order in the optimized IR for the zext-or-icmp.ll test case is different with the introduced changes. - The test cases in zext.ll have been adopted from the reverted commits r275989 and r276105. Reviewers: grosser, majnemer, spatel Subscribers: eli.friedman, majnemer, llvm-commits Differential Revision: https://reviews.llvm.org/D22864 Contributed-by: Matthias Reisinger <d412vv1n@gmail.com> llvm-svn: 277635
142 lines
4.6 KiB
LLVM
142 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i64 @test_sext_zext(i16 %A) {
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; CHECK-LABEL: @test_sext_zext(
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; CHECK-NEXT: [[C2:%.*]] = zext i16 %A to i64
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; CHECK-NEXT: ret i64 [[C2]]
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;
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%c1 = zext i16 %A to i32
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%c2 = sext i32 %c1 to i64
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ret i64 %c2
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}
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define <2 x i64> @test2(<2 x i1> %A) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i1> %A, <i1 true, i1 true>
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; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> [[XOR]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[ZEXT]]
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;
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%xor = xor <2 x i1> %A, <i1 true, i1 true>
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%zext = zext <2 x i1> %xor to <2 x i64>
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ret <2 x i64> %zext
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}
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define <2 x i64> @test3(<2 x i64> %A) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %A, <i64 23, i64 42>
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; CHECK-NEXT: ret <2 x i64> [[AND]]
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;
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%trunc = trunc <2 x i64> %A to <2 x i32>
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%and = and <2 x i32> %trunc, <i32 23, i32 42>
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%zext = zext <2 x i32> %and to <2 x i64>
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ret <2 x i64> %zext
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}
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define <2 x i64> @test4(<2 x i64> %A) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
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; CHECK-NEXT: [[XOR:%.*]] = and <2 x i64> [[TMP1]], <i64 23, i64 42>
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; CHECK-NEXT: ret <2 x i64> [[XOR]]
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;
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%trunc = trunc <2 x i64> %A to <2 x i32>
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%and = and <2 x i32> %trunc, <i32 23, i32 42>
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%xor = xor <2 x i32> %and, <i32 23, i32 42>
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%zext = zext <2 x i32> %xor to <2 x i64>
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ret <2 x i64> %zext
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}
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define i64 @fold_xor_zext_sandwich(i1 %a) {
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; CHECK-LABEL: @fold_xor_zext_sandwich(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 %a, true
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext i1 [[TMP1]] to i64
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; CHECK-NEXT: ret i64 [[ZEXT2]]
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;
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%zext1 = zext i1 %a to i32
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%xor = xor i32 %zext1, 1
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%zext2 = zext i32 %xor to i64
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ret i64 %zext2
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}
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define <2 x i64> @fold_xor_zext_sandwich_vec(<2 x i1> %a) {
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; CHECK-LABEL: @fold_xor_zext_sandwich_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> %a, <i1 true, i1 true>
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[ZEXT2]]
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;
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%zext1 = zext <2 x i1> %a to <2 x i32>
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%xor = xor <2 x i32> %zext1, <i32 1, i32 1>
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%zext2 = zext <2 x i32> %xor to <2 x i64>
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ret <2 x i64> %zext2
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}
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; Assert that zexts in and(zext(icmp), zext(icmp)) can be folded.
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; CHECK-LABEL: @fold_and_zext_icmp(
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; CHECK-NEXT: [[ICMP1:%.*]] = icmp sgt i64 %a, %b
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; CHECK-NEXT: [[ICMP2:%.*]] = icmp slt i64 %a, %c
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; CHECK-NEXT: [[AND:%.*]] = and i1 [[ICMP1]], [[ICMP2]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[AND]] to i8
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; CHECK-NEXT: ret i8 [[ZEXT]]
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define i8 @fold_and_zext_icmp(i64 %a, i64 %b, i64 %c) {
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%1 = icmp sgt i64 %a, %b
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%2 = zext i1 %1 to i8
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%3 = icmp slt i64 %a, %c
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%4 = zext i1 %3 to i8
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%5 = and i8 %2, %4
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ret i8 %5
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}
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; Assert that zexts in or(zext(icmp), zext(icmp)) can be folded.
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; CHECK-LABEL: @fold_or_zext_icmp(
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; CHECK-NEXT: [[ICMP1:%.*]] = icmp sgt i64 %a, %b
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; CHECK-NEXT: [[ICMP2:%.*]] = icmp slt i64 %a, %c
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; CHECK-NEXT: [[OR:%.*]] = or i1 [[ICMP1]], [[ICMP2]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[OR]] to i8
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; CHECK-NEXT: ret i8 [[ZEXT]]
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define i8 @fold_or_zext_icmp(i64 %a, i64 %b, i64 %c) {
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%1 = icmp sgt i64 %a, %b
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%2 = zext i1 %1 to i8
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%3 = icmp slt i64 %a, %c
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%4 = zext i1 %3 to i8
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%5 = or i8 %2, %4
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ret i8 %5
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}
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; Assert that zexts in xor(zext(icmp), zext(icmp)) can be folded.
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; CHECK-LABEL: @fold_xor_zext_icmp(
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; CHECK-NEXT: [[ICMP1:%.*]] = icmp sgt i64 %a, %b
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; CHECK-NEXT: [[ICMP2:%.*]] = icmp slt i64 %a, %c
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; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[ICMP1]], [[ICMP2]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[XOR]] to i8
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; CHECK-NEXT: ret i8 [[ZEXT]]
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define i8 @fold_xor_zext_icmp(i64 %a, i64 %b, i64 %c) {
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%1 = icmp sgt i64 %a, %b
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%2 = zext i1 %1 to i8
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%3 = icmp slt i64 %a, %c
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%4 = zext i1 %3 to i8
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%5 = xor i8 %2, %4
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ret i8 %5
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}
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; Assert that zexts in logic(zext(icmp), zext(icmp)) are also folded accross
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; nested logical operators.
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; CHECK-LABEL: @fold_nested_logic_zext_icmp(
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; CHECK-NEXT: [[ICMP1:%.*]] = icmp sgt i64 %a, %b
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; CHECK-NEXT: [[ICMP2:%.*]] = icmp slt i64 %a, %c
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; CHECK-NEXT: [[AND:%.*]] = and i1 [[ICMP1]], [[ICMP2]]
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; CHECK-NEXT: [[ICMP3:%.*]] = icmp eq i64 %a, %d
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; CHECK-NEXT: [[OR:%.*]] = or i1 [[AND]], [[ICMP3]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[OR]] to i8
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; CHECK-NEXT: ret i8 [[ZEXT]]
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define i8 @fold_nested_logic_zext_icmp(i64 %a, i64 %b, i64 %c, i64 %d) {
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%1 = icmp sgt i64 %a, %b
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%2 = zext i1 %1 to i8
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%3 = icmp slt i64 %a, %c
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%4 = zext i1 %3 to i8
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%5 = and i8 %2, %4
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%6 = icmp eq i64 %a, %d
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%7 = zext i1 %6 to i8
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%8 = or i8 %5, %7
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ret i8 %8
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}
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