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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
67 lines
1.5 KiB
LLVM
67 lines
1.5 KiB
LLVM
; Ensure that floating point operations are lowered to function calls when the
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; FPU is not available in the hardware and that function calls are not used
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; when the FPU is available in the hardware.
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;
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; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
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; RUN: llc < %s -march=mblaze -mattr=+fpu | FileCheck -check-prefix=FPU %s
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define float @test_add(float %a, float %b) {
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; FUN: test_add:
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; FPU: test_add:
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%tmp.1 = fadd float %a, %b
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; FUN-NOT: fadd
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; FUN: brlid
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; FPU-NOT: brlid
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; FPU: fadd
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ret float %tmp.1
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; FUN: rtsd
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; FPU: rtsd
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}
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define float @test_sub(float %a, float %b) {
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; FUN: test_sub:
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; FPU: test_sub:
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%tmp.1 = fsub float %a, %b
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; FUN-NOT: frsub
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; FUN: brlid
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; FPU-NOT: brlid
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; FPU: frsub
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ret float %tmp.1
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; FUN: rtsd
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; FPU: rtsd
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}
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define float @test_mul(float %a, float %b) {
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; FUN: test_mul:
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; FPU: test_mul:
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%tmp.1 = fmul float %a, %b
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; FUN-NOT: fmul
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; FUN: brlid
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; FPU-NOT: brlid
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; FPU: fmul
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ret float %tmp.1
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; FUN: rtsd
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; FPU: rtsd
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}
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define float @test_div(float %a, float %b) {
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; FUN: test_div:
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; FPU: test_div:
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%tmp.1 = fdiv float %a, %b
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; FUN-NOT: fdiv
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; FUN: brlid
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; FPU-NOT: brlid
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; FPU: fdiv
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ret float %tmp.1
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; FUN: rtsd
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; FPU: rtsd
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}
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