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94dff8006e
This reverts commit r323991. This commit breaks target that don't model all the register constraints in TableGen. So far the workaround was to set the hasExtraXXXRegAllocReq, but it proves that it doesn't cover all the cases. For instance, when mutating an instruction (like in the lowering of COPYs) the isRenamable flag is not properly updated. The same problem will happen when attaching machine operand from one instruction to another. Geoff Berry is working on a fix in https://reviews.llvm.org/D43042. llvm-svn: 325421
47 lines
1.1 KiB
LLVM
47 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
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; LSR used to pick a sub-optimal solution due to the target responding
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; conservatively to isLegalAddImmediate for negative values.
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declare void @foo(i32)
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define void @test(i32 %px) {
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; CHECK_LABEL: test:
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; CHECK_LABEL: %entry
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; CHECK: subs
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; CHECK-NEXT: csel
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entry:
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%sub = add nsw i32 %px, -1
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%cmp = icmp slt i32 %px, 1
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%.sub = select i1 %cmp, i32 0, i32 %sub
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br label %for.body
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for.body:
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; CHECK_LABEL: %for.body
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; CHECK: cmp
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; CHECK-NEXT: b.eq
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; CHECK-LABEL: %if.then3
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%x.015 = phi i32 [ %inc, %for.inc ], [ %.sub, %entry ]
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%cmp2 = icmp eq i32 %x.015, %px
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br i1 %cmp2, label %for.inc, label %if.then3
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if.then3:
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tail call void @foo(i32 %x.015)
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br label %for.inc
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for.inc:
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; CHECK_LABEL: %for.inc
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; CHECK: cmp
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; CHECK-NEXT: add
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; CHECK-NEXT: b.le
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; CHECK_LABEL: %for.cond.cleanup
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%inc = add nsw i32 %x.015, 1
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%cmp1 = icmp sgt i32 %x.015, %px
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br i1 %cmp1, label %for.cond.cleanup.loopexit, label %for.body
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for.cond.cleanup.loopexit:
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br label %for.cond.cleanup
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for.cond.cleanup:
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ret void
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}
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