Bob Wilson 94eef3fc13 Fix pr6111: Avoid using the LR register for the target address of an indirect ... branch in ARM v4 code, since it gets clobbered by the return address before it is used. Instead of adding a new register class containing all the GPRs except LR, just use the existing tGPR class. llvm-svn: 96360		2010-02-16 17:24:15 +00:00
..
Alpha	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
ARM	Fix pr6111: Avoid using the LR register for the target address of an indirect	2010-02-16 17:24:15 +00:00
Blackfin	Teach dag combine to fold the following transformation more aggressively:	2010-01-06 19:38:29 +00:00
CBackend
CellSPU	don't let asm-verbose break the check-next lines in these tests.	2010-01-19 06:39:54 +00:00
CPP
Generic	Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there	2010-02-15 22:35:59 +00:00
Mips	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
MSP430	Reenable tests	2010-01-15 21:19:26 +00:00
PIC16	emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1,	2010-01-20 07:19:19 +00:00
PowerPC	When save/restoring CR at prolog/epilog, in a large	2010-02-12 21:35:34 +00:00
SPARC	add support for the sparcv9-*-* target triple to turn on	2010-02-04 06:34:01 +00:00
SystemZ	Teach dag combine to fold the following transformation more aggressively:	2010-01-06 19:38:29 +00:00
Thumb	Run the pre-register allocation tail duplication pass by default. Remove	2010-01-16 00:29:50 +00:00
Thumb2	Last week we were generating code with duplicate induction variables in this	2010-02-15 21:56:40 +00:00
X86	Split the main for-each-use loop again, this time for GenerateTruncates,	2010-02-16 01:42:53 +00:00
XCore	convert the last 3 targets to use EmitFunctionBody() now that	2010-01-28 06:22:43 +00:00